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AD7172-4BCPZ Arkusz danych(PDF) 10 Page - Analog Devices

Numer części AD7172-4BCPZ
Szczegółowy opis  Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers
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AD7172-4
Data Sheet
Rev. A | Page 10 of 61
Pin
No.
Mnemonic
Type1
Description
14
CS
DI
Chip Select Input. This is an active low logic input used to select the ADC. CS can be used to select the ADC
in systems with more than one device on the serial bus. CS can be hardwired low, allowing the ADC to operate
in 3-wire mode with the SCLK, DIN, and DOUT pins interfacing with the device. When CS is high, the
DOUT/RDY output is tristated.
15
ERROR
DI/O
This pin can be used in one of the following three modes:
Active low error input mode: this mode sets the ADC_ERROR bit in the status register.
Active low, open-drain error output mode: the status register error bits are mapped to the ERROR pin. The
ERROR pins of multiple devices can be wired together to a common pull-up resistor so that an error on any
device can be observed.
General-purpose output mode: the status of the pin is controlled by the ERR_DAT bit in the GPIOCON register.
The pin is referenced between IOVDD and DGND, as opposed to the AVDD1 and AVSS levels used by the
GPIO0 and GPIO1 pins. The ERROR pin has an active pull-up in this case.
16
SYNC
DI
Synchronization Input. This pin allows synchronization of the digital filters and analog modulators when
using multiple AD7172-4 devices.
17
IOVDD
P
Digital Input/Output Supply Voltage. The IOVDD voltage ranges from 2 V to 5 V. IOVDD is independent of
AVDD1 and AVDD2. For example, IOVDD can be operated at 3.3 V when AVDD1 or AVDD2 equals 5 V, or
vice versa. If AVSS is set to −2.5 V, the voltage on IOVDD must not exceed 3.6 V.
18
DGND
P
Digital Ground.
19
REGCAPD
AO
Digital LDO Regulator Output. This pin is for decoupling purposes only. Decouple this pin to DGND using
a 1 µF capacitor.
20
GPIO0
I/O
General-Purpose Input/Output. 0 The logic input/output on this this pin is referred to the AVDD1 and AVSS
supplies.
21
GPIO1
I/O
General-Purpose Input/Output 1. The logic input/output on this this pin is referred to the AVDD1 and AVSS
supplies.
22
GPO2
O
General-Purpose Output. The logic output on this this pin is referred to the AVDD1 and AVSS supplies.
23
AIN2
AI
Analog Input 2. Analog Input 2 is selectable through the crosspoint multiplexer.
24
AIN3
AI
Analog Input 3. Analog Input 3 is selectable through the crosspoint multiplexer.
25
AIN4
AI
Analog Input 4. Analog Input 4 is selectable through the crosspoint multiplexer.
26
AIN5
AI
Analog Input 5. Analog Input 5 is selectable through the crosspoint multiplexer.
27
AIN6
AI
Analog Input 6. Analog Input 6 is selectable through the crosspoint multiplexer.
28
AIN7
AI
Analog Input 7. Analog Input 7 is selectable through the crosspoint multiplexer.
29
AIN8
AI
Analog Input 8. Analog Input 8 is selectable through the crosspoint multiplexer.
30
GPO3
O
General-Purpose Output. The logic output on this this pin is referred to the AVDD1 and AVSS supplies.
31
REF−
AI
Reference 1 Input Negative Terminal. REF− can span from AVSS to AVDD1 − 1 V. Reference 1 can be
selected through the REF_SELx bits in the setup configuration (SETUPCONx) registers.
32
REF+
AI
Reference 1 Input Positive Terminal. A reference can be applied between REF+ and REF−. REF+ can span
from AVDD1 to AVSS + 1 V. Reference 1 can be selected through the REF_SELx bits in the setup
configuration (SETUPCONx) registers.
EP
P
Exposed Pad. Solder the exposed pad to a similar pad on the printed circuit board (PCB) under the
exposed pad to confer mechanical strength to the package and for heat dissipation. The exposed pad must
be connected to AVSS through this pad on the PCB.
1
AI is analog input, AO is analog output, DI/O is bidirectional digital input/output, DO is digital output, DI is digital input, and P is power supply, I/O is input/output, and
O is output.


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