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AD7175-2BRUZ Arkusz danych(PDF) 9 Page - Analog Devices

Numer części AD7175-2BRUZ
Szczegółowy opis  24-Bit, 250 kSPS, Sigma-Delta ADC with 20 us Settling and True Rail-to-Rail Buffers
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7175-2BRUZ Arkusz danych(HTML) 9 Page - Analog Devices

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Data Sheet
AD7175-2
Rev. A | Page 9 of 63
Product
Overview
Online
Documentation
Design
Resources
Discussion
Sample
& Buy
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Rating
AVDD1, AVDD2 to AVSS
−0.3 V to +6.5 V
AVDD1 to DGND
−0.3 V to +6.5 V
IOVDD to DGND
−0.3 V to +6.5 V
IOVDD to AVSS
−0.3 V to +7.5 V
AVSS to DGND
−3.25 V to +0.3 V
Analog Input Voltage to AVSS
−0.3 V to AVDD1 + 0.3 V
Reference Input Voltage to AVSS
−0.3 V to AVDD1 + 0.3 V
Digital Input Voltage to DGND
−0.3 V to IOVDD + 0.3 V
Digital Output Voltage to DGND
−0.3 V to IOVDD + 0.3 V
Analog Input/Digital Input Current
10 mA
Operating Temperature Range
−40°C to +105°C
Storage Temperature Range
−65°C to +150°C
Maximum Junction Temperature
150°C
Lead Soldering, Reflow Temperature
260°C
ESD Rating (HBM)
4 kV
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for a device soldered on a JEDEC test board for
surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
Unit
24-Lead TSSOP
JEDEC 1-Layer Board
149
°C/W
JEDEC 2-Layer Board
81
°C/W
ESD CAUTION


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