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AD1981AJST Arkusz danych(PDF) 9 Page - Analog Devices

Numer części AD1981AJST
Szczegółowy opis  AC ??7 SoundMAX Codec
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AD1981AJST Arkusz danych(HTML) 9 Page - Analog Devices

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REV. 0
AD1981A
–9–
Bit
Function
AD1981A
ID0
Dedicated Mic PCM In Channel
0
ID1
Modem Line Codec Support
0
ID2
Bass and Treble Control
0
ID3
Simulated Stereo (Mono to Stereo)
0
ID4
Headphone Out Support
1
ID5
Loudness (Bass Boost) Support
0
ID6
18-Bit DAC Resolution
0
ID7
20-Bit DAC Resolution
1
ID8
18-Bit ADC Resolution
0
ID9
20-Bit ADC Resolution
0
Reset (Index 00h)
Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h, which forces the serial configuration).
Reading this register returns the ID code of the part and a code for the type of 3D Stereo Enhancement.
ID[9:0] Identify Capability. The ID decodes the capabilities of AD1981A based on the following:
SE[4:0] Stereo Enhancement: The AD1981A does not provide hardware 3D stereo enhancement (all bits are zeros).
Master Volume Register (Index 02h)
* For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
This register controls the line_out volume controls for both stereo channels and mute bit. Each volume subregister contains 5 bits,
generating 32 volume levels with 31 steps of 1.5 dB each.
Because AC ‘97 defines 6-bit volume registers, to maintain compatibility whenever the D5 or D13 bits are set to “1,” their respective
lower five volume bits are automatically set to “1” by the Codec logic. On readback, all lower 5 bits will read ones whenever these
bits are set to “1.”
RMV[4:0]
Right Master Volume Control: The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of –46.5 dB.
RM
Right Channel Mute: Once enabled by the MSPLT Bit in Register 76h, this bit mutes the right channel separately
from the MM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.”
LMV[4:0]
Left Master Volume Control: The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of –46.5 dB.
MM
Master Volume Mute: When this bit is set to “1,” both L/R channels are muted, unless the MSPLT bit in Register
76h is set to “1,” in which case this mute bit will only affect the left channel.
xMV5…xMV0
MM
WRITE
READBACK
Function
0
00 0000
00 0000
0 dB Gain
0
00 1111
00 1111
–22.5 dB Gain
0
01 1111
01 1111
–46.5 dB Gain
0
1x xxxx
01 1111
–46.5 dB Gain
1
xx xxxx
xx xxxx
∞ dB Gain
Reg Num Name D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 Default
00h
Reset
X
SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
0090h
Reg Num Name
D15 D14 D13
D12
D11
D10
D9
D8
D7 D6 D5
D4
D3
D2
D1
D0
Default
02h
Master Volume MM
X
X LMV4 LMV3 LMV2 LMV1 LMV0 RM* X
X RMV4 RMV3 RMV2 RMV1 RMV0 8000h


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