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AD9214 Arkusz danych(PDF) 7 Page - Analog Devices |
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AD9214 Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 20 page REV. D AD9214 –7– TERMINOLOGY Analog Bandwidth The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay The delay between the 50% point of the rising edge of the ENCODE command and the instant at which the analog input is sampled. Aperture Uncertainty (Jitter) The sample-to-sample variation in aperture delay. Differential Analog Input Resistance, Differential Analog Input Capacitance and Differential Analog Input Impedance The real and complex impedances measured at each analog input port. The resistance is measured statically and the capaci- tance and differential input impedances are measured with a network analyzer. Differential Analog Input Voltage Range The peak-to-peak differential voltage that must be applied to the converter to generate a full-scale response. Peak differen- tial voltage is computed by observing the voltage on a single pin and subtracting the voltage from the other pin, which is 180 degrees out of phase. Peak-to-peak differential is computed by rotating the inputs phase 180 degrees and taking the peak measurement again. Then the difference is computed between both peak measurements. Differential Nonlinearity The deviation of any code width from an ideal 1 LSB step. Effective Number of Bits The effective number of bits (ENOB) is calculated from the measured SNR based on the equation: ENOB SINAD dB Full Scale Actual MEASURED = + – . log . 176 20 602 Encode Pulsewidth/Duty Cycle Pulsewidth high is the minimum amount of time that the ENCODE pulse should be left in Logic “1” state to achieve rated performance; pulsewidth low is the minimum time ENCODE pulse should be left in low state. See timing implications of changing tENCH in text. At a given clock rate, these specs define an acceptable Encode duty cycle. Full-Scale Input Power Expressed in dBm. Computed using the following equation: Power V Z FULL SCALE FULL SCALE rms INPUT = 10 0 001 2 log . Gain Error Gain error is the difference between the measured and ideal full scale input voltage range of the ADC. Harmonic Distortion, Second The ratio of the rms signal amplitude to the rms value of the second harmonic component, reported in dBc. Harmonic Distortion, Third The ratio of the rms signal amplitude to the rms value of the third harmonic component, reported in dBc. Integral Nonlinearity The deviation of the transfer function from a reference line measured in fractions of 1 LSB using a “best straight line” determined by a least square curve fit. Minimum Conversion Rate The encode rate at which the SNR of the lowest analog signal frequency drops by no more than 3 dB below the guaranteed limit. Maximum Conversion Rate The encode rate at which parametric testing is performed. Output Propagation Delay The delay between a differential crossing of ENCODE and ENCODE and the time when all output data bits are within valid logic levels. Noise (for any range within the ADC) VZ FS SNR Signal NOISE dBm dBc dBFS =× × −− 0 001 10 10 . Where Z is the input impedance, FS is the full-scale of the device for the frequency in question, SNR is the value for the particular input level and Signal is the signal level within the ADC reported in dB below full-scale. This value includes both thermal and quantization noise. Power Supply Rejection Ratio (PSRR) The ratio of a change in input offset voltage to a change in power supply voltage. Signal-to-Noise-and-Distortion (SINAD) The ratio of the rms signal amplitude (set 0.5 dB below full scale) to the rms value of the sum of all other spectral compo- nents, including harmonics but excluding dc. Signal-to-Noise Ratio (without Harmonics) The ratio of the rms signal amplitude (set at 0.5 dB below full scale) to the rms value of the sum of all other spectral compo- nents, excluding the first five harmonics and dc. Spurious-Free Dynamic Range (SFDR) The ratio of the rms signal amplitude to the rms value of the peak spurious spectral component. The peak spurious compo- nent may or may not be a harmonic. May be reported in dBc (i.e., degrades as signal level is lowered), or dBFS (always related back to converter full scale). Two-Tone Intermodulation Distortion Rejection The ratio of the rms value of either input tone to the rms value of the worst third order intermodulation product; reported in dBc. Two-Tone SFDR The ratio of the rms value of either input tone to the rms value of the peak spurious component. The peak spurious component may or may not be an intermodulation distortion product. May be reported in dBc (i.e., degrades as signal level is lowered), or in dBFS (always related back to converter full scale). Worst Other Spur The ratio of the rms signal amplitude to the rms value of the worst spurious component (excluding the second and third harmonic) reported in dBc. |
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