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FDC2214-Q1 Arkusz danych(PDF) 11 Page - Texas Instruments

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Numer części FDC2214-Q1
Szczegółowy opis  Multi-Channel 12-Bit or 28-Bit Capacitance-to-Digital Converter
Download  60 Pages
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

FDC2214-Q1 Arkusz danych(HTML) 11 Page - Texas Instruments

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IN0A
IN0B
IN3A
IN3B
FDC2114 / FDC2214
VDD
GND
SCL
SDA
Int. Osc.
ADDR
INTB
SD
GND
MCU
VDD
3.3 V
3.3 V
GPIO
GPIO
0.1 F 1 F
Core
I
2C
I
2C
peripheral
3.3 V
L
Cap
Sensor 0
CLKIN
40 MHz
C
L
Cap
Sensor 3
C
Resonant
circuit driver
Resonant
circuit driver
Copyright © 2016, Texas Instruments Incorporated
11
FDC2112-Q1, FDC2114-Q1, FDC2212-Q1, FDC2214-Q1
www.ti.com
SNOSCZ9 – MAY 2016
Product Folder Links: FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Functional Block Diagrams (continued)
Figure 11. Block Diagram for the FDC2114 and FDC2214
The FDC is composed of front-end resonant circuit drivers, followed by a multiplexer that sequences through the
active channels, connecting them to the core that measures and digitizes the sensor frequency (fSENSOR). The
core uses a reference frequency (fREF) to measure the sensor frequency. fREF is derived from either an internal
reference clock (oscillator), or an externally supplied clock. The digitized output for each channel is proportional
to the ratio of fSENSOR/fREF. The I2C interface is used to support device configuration and to transmit the digitized
frequency values to a host processor. The FDC can be placed in shutdown mode, saving current, using the SD
pin. The INTB pin may be configured to notify the host of changes in system status.
7.3 Feature Description
7.3.1 Clocking Architecture
Figure 12 shows the clock dividers and multiplexers of the FDC.


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