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LM3000 Arkusz danych(PDF) 4 Page - Texas Instruments |
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LM3000 Arkusz danych(HTML) 4 Page - Texas Instruments |
4 / 41 page LM3000 SNVS612B – JULY 2009 – REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS Pin No. Name Description 1 VSW2 Switch node sense for channel 2. 2 PGND2 Power ground for channel 2 low-side drivers.(1) 3 LG2 Channel 2 low-side gate drive for external MOSFET. 4 VIN Chip supply voltage, input to the VDD and VDR regulators. (3.3V to 18.5V) 5 VDR Supply for low-side gate drivers. 6 LG1 Channel 1 low-side gate drive for external MOSFET. 7 PGND1 Power ground for channel 1 low-side drivers.(1) 8 VSW1 Switch node sense for channel 1. 9 ILIM1 Current limit setting input for channel 1. 10 HG1 Channel 1 high-side gate drive for external MOSFET. 11 VCB1 Boost voltage for channel 1 high-side driver. 12 VDD Supply for control circuitry. 13 EA1_GND Error amplifier ground sense for channel 1.(1) 14 FB1 Error amplifier input for channel 1. 15 COMP1 Error amplifier output for channel 1. 16 PGOOD1 Power good signal for channel 1 under-voltage and over-voltage. 17 FREQ/SYNC Frequency set / synchronization input for internal PLL. 18 EN1 Channel 1 enable input. Used to set the emulated current slope for channel 1. 19 TRK1 Channel 1 track input. 20 SS1 Channel 1 soft-start. 21 TRK2 Channel 2 track input. 22 SS2 Channel 2 soft-start. 23 EN2 Channel 2 enable input. Used to set the emulated current slope for channel 2. 24 PGOOD2 Power good signal for channel 2 under-voltage and over-voltage. 25 COMP2 Error amplifier output for channel 2. 26 FB2 Error amplifier input for channel 2. 27 EA2_GND Error amplifier ground sense for channel 2.(1) 28 CLKOUT Output clock. CLKOUT is shifted 90 degrees from SYNC input. 29 SGND Local signal ground.* 30 VCB2 Boost voltage for channel 2 high-side driver. 31 HG2 Channel 2 high-side gate drive for external MOSFET. 32 ILIM2 Current limit setting input for channel 2. DAP Exposed die attach pad. Connect the DAP directly to SGND.(1) (1) The LM3000 offers true remote ground sensing to achieve very tight line and load regulation. For best layout practice, the EA1_GND, and EA2_GND should be tied to the ground end of the output capacitor (or output terminal) for VOUT1 and VOUT2 respectively. Inside the LM3000, the two power ground nodes PGND1 and PGND2 are physically isolated from each other and also isolated from the internal signal ground SGND. In order to achieve the best cross-channel noise rejection, it is advised to keep these three grounds isolated from each other for the most part in the board layout and only tie them together at the ground terminals. 4 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM3000 |
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