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SN74ABTH245PWR Arkusz danych(PDF) 1 Page - Texas Instruments |
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SN74ABTH245PWR Arkusz danych(HTML) 1 Page - Texas Instruments |
1 / 22 page SN54ABTH245, SN74ABTH245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Latch-Up Performance Exceeds 500 mA Per JESD 17 D Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C D Ioff and Power-Up 3-State Support Hot Insertion D High-Drive Outputs (–32-mA IOH, 64-mA IOL) D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Thin Very Small-Outline (DGV) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package description These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ABTH245 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74ABTH245 is characterized for operation from –40 °C to 85°C. Copyright © 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC- ΙΙB is a trademark of Texas Instruments Incorporated. SN54ABTH245 ...J OR W PACKAGE SN74ABTH245 . . . DB, DGV, DW, N, OR PW PACKAGE (TOP VIEW) SN54ABTH245 . . . FK PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 DIR A1 A2 A3 A4 A5 A6 A7 A8 GND VCC OE B1 B2 B3 B4 B5 B6 B7 B8 32 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 B1 B2 B3 B4 B5 A3 A4 A5 A6 A7 |
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