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SN74ACT534NSR Arkusz danych(PDF) 1 Page - Texas Instruments |
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SN74ACT534NSR Arkusz danych(HTML) 1 Page - Texas Instruments |
1 / 27 page SN54ACT534, SN74ACT534 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS556C – NOVEMBER 1995 – REVISED NOVEMBER 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible D 3-State Inverting Outputs Drive Bus Lines Directly D Full Parallel Access for Loading description/ordering information These octal edge-triggered D-type flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the complements of the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74ACT534N SN74ACT534N SOIC DW Tube SN74ACT534DW ACT534 40 °Cto85°C SOIC – DW Tape and reel SN74ACT534DWR ACT534 –40 °C to 85°C SOP – NS Tape and reel SN74ACT534NSR ACT534 SSOP – DB Tape and reel SN74ACT534DBR AD534 TSSOP – PW Tape and reel SN74ACT534PWR AD534 CDIP – J Tube SNJ54ACT534J SNJ54ACT534J –55 °C to 125°C CFP – W Tube SNJ54ACT534W SNJ54ACT534W LCCC – FK Tube SNJ54ACT534FK SNJ54ACT534FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2002, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK SN54ACT534 ...J OR W PACKAGE SN74ACT534 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) 32 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 8D 7D 7Q 6Q 6D 2D 2Q 3Q 3D 4D SN54ACT534 . . . FK PACKAGE (TOP VIEW) |
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