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TL16C450N Arkusz danych(PDF) 3 Page - Texas Instruments |
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TL16C450N Arkusz danych(HTML) 3 Page - Texas Instruments |
3 / 27 page TL16C450 ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS037C − MARCH 1988 − REVISED JANUARY 2006 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 block diagram Receiver Buffer Register Line Control Register Divisor Latch (LS) 36 40 37 41 42 43 38 35 13 17 10 11 31 30 29 14 15 16 28 39 25 24 21 20 26 27 18 19 2 − 9 33 A0 A1 A2 CS0 CS1 CS2 ADS MR DISTR DISTR DOSTR DOSTR CSOUT XTAL1 XTAL2 D7 − D0 DDIS RTS CTS DTR DSR DCD RI OUT1 OUT2 SOUT BAUDOUT RCLK SIN INTRPT VCC VSS 44 22 Divisor Latch (MS) Line Status Register Transmitter Holding Register Modem Control Register Modem Status Register Interrupt Enable Register Interrupt I/O Register Interrupt Control Logic Baud Generator Receiver Shift Register Receiver Timing and Control Data Bus Buffer Internal Data Bus Transmitter Timing and Control Transmitter Shift Register Modem Control Logic Power Supply Select and Control Logic Terminal numbers shown are for the FN package. |
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