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SN7407DRE4 Arkusz danych(PDF) 7 Page - Texas Instruments |
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SN7407DRE4 Arkusz danych(HTML) 7 Page - Texas Instruments |
7 / 25 page From Output Under Test CL (see Note A) RL Test Point VCC LOAD CIRCUIT 1.5 V 1.5 V High-Level Pulse 1.5 V 1.5 V tw Low-Level Pulse VOLTAGE WAVEFORMS PULSE WIDTHS 1.5 V 1.5 V Input tPLH In-Phase Output 3 V 0 V 1.5 V 1.5 V VOH VOL tPHL 1.5 V 1.5 V VOH VOL tPHL tPLH Out-of-Phase Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 7 SN5407, SN5417, SN7407, SN7417 www.ti.com SDLS032H – DECEMBER 1983 – REVISED SEPTEMBER 2016 Product Folder Links: SN5407 SN5417 SN7407 SN7417 Submit Documentation Feedback Copyright © 1983–2016, Texas Instruments Incorporated 7 Parameter Measurement Information A. CL includes probe and jig capacitance. B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 7 ns, tf ≤ 7 ns. D. The outputs are measured one at a time, with one input transition per measurement. Figure 2. Load Circuit and Voltage Waveforms |
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