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KM29U128IT Arkusz danych(PDF) 8 Page - Samsung semiconductor

Numer części KM29U128IT
Szczegółowy opis  16M x 8 Bit NAND Flash Memory
Download  26 Pages
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Producent  SAMSUNG [Samsung semiconductor]
Strona internetowa  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM29U128IT Arkusz danych(HTML) 8 Page - Samsung semiconductor

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KM29U128T, KM29U128IT
FLASH MEMORY
8
AC Characteristics for Operation
NOTE : 1. If CE goes high within 30ns after the rising edge of the last RE, R/B will not return to VOL.
2. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
3. To break the sequential read cycle, CE must be held high for longer time than tCEH.
Parameter
Symbol
Min
Max
Unit
Data Transfer from Cell to Register
tR
-
10
µs
ALE to RE Delay( ID read )
tAR1
100
-
ns
ALE to RE Delay(Read cycle)
tAR2
50
-
ns
CE to RE Delay( ID read)
tCR
100
-
ns
Ready to RE Low
tRR
20
-
ns
RE Pulse Width
tRP
30
-
ns
WE High to Busy
tWB
-
100
ns
Read Cycle Time
tRC
50
-
ns
RE Access Time
tREA
-
35
ns
RE High to Output Hi-Z
tRHZ
15
30
ns
CE High to Output Hi-Z
tCHZ
-
20
ns
RE High Hold Time
tREH
15
-
ns
Output Hi-Z to RE Low
tIR
0
-
ns
Last RE High to Busy(at sequential read)
tRB
-
100
ns
CE High to Ready(in case of interception by CE at read)(1)
tCRY
-
50 +tr(R/B)(2)
ns
CE High Hold Time(at the last serial read)(3)
tCEH
100
-
ns
RE Low to Status Output
tRSTO
-
35
ns
CE Low to Status Output
tCSTO
-
45
ns
WE High to RE Low
tWHR
60
-
ns
RE access time(Read ID)
tREADID
-
35
ns
Device Resetting Time(Read/Program/Erase)
tRST
-
5/10/500
µs
AC Timing Characteristics for Command / Address / Data Input
Parameter
Symbol
Min
Max
Unit
CLE Set-up Time
tCLS
0
-
ns
CLE Hold Time
tCLH
10
-
ns
CE Setup Time
tCS
0
-
ns
CE Hold Time
tCH
10
-
ns
WE Pulse Width
tWP
25
-
ns
ALE Setup Time
tALS
0
-
ns
ALE Hold Time
tALH
10
-
ns
Data Setup Time
tDS
20
-
ns
Data Hold Time
tDH
10
-
ns
Write Cycle Time
tWC
50
-
ns
WE High Hold Time
tWH
15
-
ns


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