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MC10H131 Arkusz danych(PDF) 3 Page - ON Semiconductor |
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MC10H131 Arkusz danych(HTML) 3 Page - ON Semiconductor |
3 / 5 page MC10H131 www.onsemi.com 3 Table 4. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 1) 0° 25° 75° Symbol Characteristic Min Max Min Max Min Max Unit IE Power Supply Current − 62 − 56 − 62 mA IinH Input Current High Pins 6, 11 Pin 9 Pins 7, 10 Pins 4, 5, 12, 13 − − − − 530 660 485 790 − − − − 310 390 285 465 − − − − 310 390 285 465 mA IinL Input Current Low 0.5 − 0.5 − 0.3 − mA VOH High Output Voltage −1.02 −0.84 −0.98 −0.81 −0.92 −0.735 Vdc VOL Low Output Voltage −1.95 −1.63 −1.95 −1.63 −1.95 −1.60 Vdc VIH High Input Voltage −1.17 −0.84 −1.13 −0.81 −1.07 −0.735 Vdc VIL Low Input Voltage −1.95 −1.48 −1.95 −1.48 −1.95 −1.45 Vdc 1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. Outputs are terminated through a 50 W resistor to −2.0 V. Table 5. AC CHARACTERISTICS 0° 25° 75° Symbol Characteristic Min Max Min Max Min Max Unit tpd Propagation Delay Clock, CE Set, Reset 0.8 0.6 1.6 1.6 0.8 0.7 1.7 1.7 0.8 0.7 1.8 1.8 ns tr Rise Time 0.6 2.0 0.6 2.0 0.6 2.2 ns tf Fall Time 0.6 2.0 0.6 2.0 0.6 2.2 ns tset Set-up Time 0.7 − 0.7 − 0.7 − ns thold Hold Time 0.8 − 0.8 − 0.8 − ns ftog Toggle Frequency 250 − 250 − 250 − MHz NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. APPLICATION INFORMATION The MC10H131 is a dual master-slave type D flip-flop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip-flop may be clocked separately by holding the common clock in the new low state and using the enable inputs for the clocking function. If the common clock is to be used to clock the flip-flop, the Clock Enable inputs must be in the low state. In this case, the enable inputs perform the function of controlling the common clock. The output states of the flip-flop change on the positive transition of the clock. A change in the information present at the data (D) input will not affect the output information at any other time due to master slave construction. |
Podobny numer części - MC10H131_16 |
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Podobny opis - MC10H131_16 |
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