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AD9122SCPZ-EP-RL Arkusz danych(PDF) 10 Page - Analog Devices

Numer części AD9122SCPZ-EP-RL
Szczegółowy opis  TxDAC Digital-to-Analog Converter
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Strona internetowa  http://www.analog.com
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AD9122SCPZ-EP-RL Arkusz danych(HTML) 10 Page - Analog Devices

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AD9122-EP
Enhanced Product
Rev. 0 | Page 10 of 12
Pin No.
Mnemonic
Description
25
D8P
Data Bit 8, Positive.
26
D8N
Data Bit 8, Negative.
27
DCIP
Data Clock Input, Positive.
28
DCIN
Data Clock Input, Negative.
29
DVDD18
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
30
DVSS
Digital Common.
31
D7P
Data Bit 7, Positive.
32
D7N
Data Bit 7, Negative.
33
D6P
Data Bit 6, Positive.
34
D6N
Data Bit 6, Negative.
35
D5P
Data Bit 5, Positive.
36
D5N
Data Bit 5, Negative.
37
D4P
Data Bit 4, Positive.
38
D4N
Data Bit 4, Negative.
39
D3P
Data Bit 3, Positive.
40
D3N
Data Bit 3, Negative.
41
D2P
Data Bit 2, Positive.
42
D2N
Data Bit 2, Negative.
43
DVDD18
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
44
DVSS
Digital Common.
45
D1P
Data Bit 1, Positive.
46
D1N
Data Bit 1, Negative.
47
D0P
Data Bit 0 (LSB), Positive.
48
D0N
Data Bit 0 (LSB), Negative.
49
DVDD18
1.8 V Digital Supply. Supplies power to digital core and digital data ports.
50
SDO
Serial Port Data Output (CMOS Levels with Respect to IOVDD).
51
SDIO
Serial Port Data Input/Output (CMOS Levels with Respect to IOVDD).
52
SCLK
Serial Port Clock Input (CMOS Levels with Respect to IOVDD).
53
CS
Serial Port Chip Select, Active Low (CMOS Levels with Respect to IOVDD).
54
RESET
Reset, Active Low (CMOS Levels with Respect to IOVDD).
55
NC
No Connect. Do not connect to this pin.
56
AVSS
Analog Supply Common.
57
AVDD33
3.3 V Analog Supply.
58
IOUT2P
Q DAC Positive Current Output.
59
IOUT2N
Q DAC Negative Current Output.
60
AVDD33
3.3 V Analog Supply.
61
AVSS
Analog Supply Common.
62
REFIO
Voltage Reference. Nominally 1.2 V output. Should be decoupled to AVSS.
63
FSADJ
Full-Scale Current Output Adjust. Place a 10 kΩ resistor from this pin to AVSS.
64
AVSS
Analog Supply Common.
65
AVDD33
3.3 V Analog Supply.
66
IOUT1N
I DAC Negative Current Output.
67
IOUT1P
I DAC Positive Current Output.
68
AVDD33
3.3 V Analog Supply.
69
REFCLKN
PLL Reference Clock Input, Negative. This pin has a secondary function as a synchronization input.
70
REFCLKP
PLL Reference Clock Input, Positive. This pin has a secondary function as a synchronization input.
71
CVDD18
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
72
CVDD18
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
EPAD
The exposed pad (EPAD) must be soldered to the ground plane (AVSS). The EPAD provides an electrical,
thermal, and mechanical connection to the board.


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