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BU2098F Arkusz danych(PDF) 7 Page - Rohm |
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BU2098F Arkusz danych(HTML) 7 Page - Rohm |
7 / 18 page . 7/14 BU2098F TSZ02201-0RHR1GZ00100-1-2 © 2013 ROHM Co., Ltd. All rights reserved. 01.Sep.2015 Rev.002 TSZ22111・15・001 www.rohm.com Function 1. Serial Interfacce 1.1 Start condition The start condition is a “HIGH” to “LOW” transition of the SDA line while SCL is “HIGH”. 1.2 Stop condition The stop condition is a “LOW” to “HIGH” transition of the SDA line while SCL is “HIGH”. Figure 9. Start / Stop condition 1.3 Acknowledge The master (µp) puts a resistive “HIGH” level on the SDA line during the acknowledge clock pulse. The peripheral (audio processor) that acknowledge has to pull-down (“LOW”) the SDA line during the acknowledge clock pulse, so that the SDA line is stable “LOW” during this clock pulse. The slave which has been addressed has to generate an acknowledgement after the reception of each byte, otherwise the SDA line remains at the “HIGH” level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. Figure 10. Acknowledge Start condition SDA SCL S P Stop condition confirm 9 8 1 SCL (from master) SDA (from master) SDA (from slave) S not confirm ACK signal clock for acknowledge |
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