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9ZXL1530BKLFT Arkusz danych(PDF) 7 Page - Integrated Device Technology |
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9ZXL1530BKLFT Arkusz danych(HTML) 7 Page - Integrated Device Technology |
7 / 19 page 9ZXL1530 15-OUTPUT DB1900Z LOW-POWER DERIVATIVE IDT® 15-OUTPUT DB1900Z LOW-POWER DERIVATIVE 7 9ZXL1530 REV D 112015 Electrical Characteristics–DIF 0.7V Low Power Differential Outputs Electrical Characteristics–Current Consumption TA = TCOM; Supply Voltage VDD/VD DA = 3.3 V +/-5%, VDDIO = 1.05 to 3.3V +/-5%. See Test Loads for Loading C onditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Slew rate Trf Scope averaging on 1 3 4 V/ns 1, 2, 3 Slew rate matching ∆Trf Slew rate matching. 7.6 20 % 1, 2, 4 Voltage High VHigh 660 757 850 1 Voltage Low VLow -150 16 150 1 Max Voltage Vmax 857 1150 1 Min Voltage Vmin -300 -36 1 Vsw ing Vswing Scope averaging off 300 mV 1, 2 Crossing Voltage (abs) Vcross_abs Scope averaging off 300 469 550 mV 1, 5 Crossing Voltage (var) ∆-Vcross Scope averaging off 14 140 mV 1, 6 2 Measured from differential waveform 6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross absolute) allowed. The intent is to limit Vcross induced modulation by setting ∆-Vcross to be smaller than Vcross absolute. mV Statistical measurement on single-ended signal using oscilloscope math function. (Scope averaging on) Measurement on single ended signal using absolute value. (Scope averaging off) mV 1Guaranteed by design and characterization, not 100% tested in production. C L = 2pF with R S = 2 7Ω fo r Zo = 85Ω diffe rential tra ce impedance. 3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around differential 0V. 4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the oscilloscope is to use for the edge rate calculations. 5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising edge (i.e. Clock rising and Clock# falling). TA = TCOM; Supply Voltage VDD/VDDA = 3.3 V +/-5%, VDDIO = 1.05 to 3.3V +/-5%. See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES IDDVDD All outputs active @100MHz, CL = 2pF; 23 40 mA 1 I DDVDDA/R All outputs active @100MHz, C L = 2p F; 15 20 mA 1 I DDVD DIO All outputs active @100MHz, C L = 2p F; 124 150 mA 1 IDDVDDPD All differential pairs low-low 2.2 4 mA 1 I DD VDD A/RPD All differential pairs low-low 4.9 7 mA 1 I DDVD DIOPD All differential pairs low-low 0.16 0.5 mA 1 1Guaranteed by design and characterization, not 100% tested in production. Operating Supply Current Powerdown Current |
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