MC74AC374, MC74ACT374

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2

TRUTH TABLE

Inputs

Outputs

CP

OE

H

L

H

L

L

L

X

X

H

Z

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

= LOW-to-HIGH Transition

FUNCTIONAL DESCRIPTION

The MC74AC374/74ACT374 consists of eight edge−

triggered flip−flops with individual D−type inputs and

3−state true outputs. The buffered clock and buffered Output

Enable are common to all flip−flops. The eight flip−flops

will store the state of their individual D inputs that meet the

setup and hold time requirements on the LOW−to−HIGH

Clock (CP) transition. With the Output Enable (OE) LOW,

the contents of the eight flip−flops are available at the

outputs. When the OE is HIGH, the outputs go to the high

impedance state. Operation of the OE input does not affect

the state of the flip−flops.

Figure 3. Logic Diagram

CP

D

QQ

CP

D

QQ

CP

D

QQ

CP

D

QQ

CP

D

QQ

CP

D

QQ

CP

D

QQ

CP

D

QQ

OE

CP

NOTE:

That this diagram is provided only for the understanding of logic

operations and should not be used to estimate propagation delays.