MC74AC257, MC74ACT257

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2

PIN NAME

PIN

FUNCTION

S

Common Data Select Input

OE

3−State Output Enable Input

Data Inputs from Source 0

Data Inputs from Source 1

3−State Multiplexer Outputs

TRUTH TABLE

Output

Enable

Select

Input

Data

Inputs

Outputs

OE

S

Z

H

X

X

X

Z

L

H

X

LL

L

H

X

HH

L

L

L

XL

L

L

H

X

H

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

Figure 2. Logic Symbol

S

FUNCTIONAL DESCRIPTION

The

MC74AC257/74ACT257

is

a

quad

2−input

multiplexer with 3−state outputs. It selects four bits of data

from two sources under control of a Common Data Select

selected. The data on the selected inputs appears at the

outputs in true (noninverted) form. The device is the logic

implementation of a 4−pole, 2−position switch where the

position of the switch is determined by the logic levels

supplied to the Select input. The logic equations for the

outputs are shown below:

When the Output Enable input (OE) is HIGH, the outputs

are forced to a high impedance state. If the outputs are tied

together, all but one device must be in the high impedance

state to avoid high currents that would exceed the maximum

ratings. Designers should ensure the Output Enable signals

to 3−state devices whose outputs are tied together are

designed so there is no overlap.

NOTE:

This diagram is provided only for the understanding of logic operations

and should not be used to estimate propagation delays.

OE

S

Figure 3. Logic Diagram