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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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TP5510N Arkusz danych(PDF) 4 Page - National Semiconductor (TI) |
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TP5510N Arkusz danych(HTML) 4 Page - National Semiconductor (TI) |
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4 / 12 page  Functional Description (Continued) edges latch in the seven remaining bits Both devices may utilize the short frame sync pulse in synchronous or asyn- chronous operating mode LONG FRAME SYNC OPERATION To use the long frame mode both the frame sync pulses FSE and FSD must be three or more bit clock periods long with timing relationships specified in Figure 3 Based on the transmit frame sync FSE the AFE will sense whether short or long frame sync pulses are being used For 64 kHz oper- ation the frame sync pulse must be kept low for a minimum of 160 ns The DE TRI-STATE output buffer is enabled with the rising edge of FSE or the rising edge of BCLKE which- ever comes later and the first bit clocked out is the sign bit The following seven BCLKE rising edges clock out the re- maining seven bits The DE output is disabled by the falling BCLKE edge following the eighth rising edge or by FSE going low whichever comes later A rising edge on the de- code frame sync pulse FSD will cause the data at DD to be latched in on the next eight falling edges of BCLKD (BCLKE in synchronous mode) Both devices may utilize the long frame sync pulse in synchronous or asynchronous mode ENCODE SECTION The encode section input is an operational amplifier with provision for gain adjustment using two external resistors see Figure 4 The low noise and wide bandwidth allow gains in excess of 20 dB across the audio passband to be real- ized The op amp drives a unity-gain filter consisting of RC active pre-filter followed by an eighth order switched-ca- pacitor bandpass filter clocked at 256 kHz The output of this filter directly drives the AD sample-and-hold circuit The AD is of compressing type according to m-law coding conventions A precision voltage reference is trimmed in manufacturing to provide an input overload (tMAX) of nomi- nally 25V peak (See Table of Transmission Characteris- tics) The FSE frame sync pulse controls the sampling of the filter output and then the successive-approximation encod- ing cycle begins The 8-bit code is then loaded into a buffer and shifted out through DE at the next FSE pulse The total encoding delay will be approximately 165 ms (due to the encode filter) plus 125 ms (due to encoding delay) which totals 290 ms Any offset voltage due to the filters or com- parator is cancelled by sign bit integration DECODE SECTION The decode section consists of an expanding DAC which drives a fifth order switched-capacitor low pass filter clocked at 256 kHz The DAC is m-law and the 5th order low pass filter corrects for the sin xx attenuation due to the 8 kHz samplehold The filter is then followed by a 2nd order RC active post-filterpower amplifier capable of driving a 600X load to a level of 72 dBm The decode section is unity-gain Upon the occurrence of FSD the data at the DD input is clocked in on the falling edge of the next eight BCLKD (BCLKE) periods At the end of the DAC time slot the DA conversion cycle begins and 10 ms later the DAC output is updated The total DAC delay is E10 ms (DAC update) plus 110 ms (filter delay) plus 625 ms( frame) which gives approximately 180 ms http www nationalcom 4 |
Podobny numer części - TP5510N |
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Podobny opis - TP5510N |
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