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MC74VHCT14ADR2G Arkusz danych(PDF) 1 Page - ON Semiconductor |
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MC74VHCT14ADR2G Arkusz danych(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2015 April, 2015 − Rev. 7 1 Publication Order Number: MC74VHCT14A/D MC74VHCT14A Hex Schmitt Inverter The MC74VHCT14A is an advanced high speed CMOS Schmitt inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. Pin configuration and function are the same as the MC74VHCT04A, but the inputs have hysteresis and, with its Schmitt trigger function, the VHCT14A can be used as a line receiver which will receive slow input signals. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because it has full 5.0 V CMOS level output swings. The VHCT14A input structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. The output structures also provide protection when VCC = 0 V. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. Features • High Speed: tPD = 5.5 ns (Typ) at VCC = 5.0 V • Low Power Dissipation: ICC = 2.0 mA (Max) at TA = 25°C • TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Designed for 2.0 V to 5.5 V Operating Range • Low Noise: VOLP = 0.8 V (Max) • Pin and Function Compatible with Other Standard Logic Families • Chip Complexity: 60 FETs or 15 Equivalent Gates • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant www.onsemi.com See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION L H FUNCTION TABLE Inputs Outputs A H L Y MARKING DIAGRAMS TSSOP−14 DT SUFFIX CASE 948G 1 SOIC−14 D SUFFIX CASE 751A 1 A = Assembly Location WL, L = Wafer Lot Y, YY = Year WW, W = Work Week G or G = Pb−Free Package VHCT14AG AWLYWW 1 14 VHCT 14A ALYW G G 1 14 (Note: Microdot may be in either location) |
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