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AD5170BRM10 Arkusz danych(PDF) 11 Page - Analog Devices |
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AD5170BRM10 Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 24 page AD5170 Rev. A | Page 11 of 24 TEST CIRCUITS Figure 24 to Figure 29 illustrate the test circuits that define the test conditions used in the product specification tables. VMS A W B DUT V+ V+ = VDD 1LSB = V+/2N Figure 24. Test Circuit for Potentiometer Divider Nonlinearity Error (INL, DNL) NO CONNECT IW VMS A W B DUT Figure 25. Test Circuit for Resistor Position Nonlinearity Error (Rheostat Operation; R-INL, R-DNL) VMS2 VMS1 VW A W B DUT IW = VDD/RNOMINAL RW = [VMS1 – VMS2]/IW Figure 26. Test Circuit for Wiper Resistance ∆V MS% DUT ( ) A W B V+ ∆V DD% ∆V MS ∆V DD ∆V DD VA VMS V+ = VDD ± 10% PSRR (dB) = 20 LOG PSS (%/%) = Figure 27. Test Circuit for Power Supply Sensitivity (PSS, PSSR) +15V –15V W A 2.5V B VOUT OFFSET GND DUT AD8610 VIN Figure 28. Test Circuit for Gain vs. Frequency W B VCM ICM A NC GND NC VDD DUT NC = NO CONNECT Figure 29. Test Circuit for Common-Mode Leakage Current |
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