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AK7735EQ Arkusz danych(PDF) 81 Page - Asahi Kasei Microsystems

Numer części AK7735EQ
Szczegółowy opis  Dual DSP with 4chADC 4chDAC 4chSRC
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Producent  AKM [Asahi Kasei Microsystems]
Strona internetowa  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK7735EQ Arkusz danych(HTML) 81 Page - Asahi Kasei Microsystems

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[AK7735]
016014707-E-00
2016/12
- 81 -
4. RAM and Register Write/Read Timing
4-1. RAM Write Timing during DSP Reset
Write to Program RAM (PRAM), Coefficient RAM (CRAM) and Offset REG (OFREG) during DSP reset in
the order of command code (8 bits), address (16 bits) and data. When writing the data to consecutive
address locations, continue to input data only. Address is incremented by 1 automatically.
CSN
SI
SCLK
DxRESETN bit
RDY =
“H”
Command
Address
DATA
DATA
DATA
DATA
DATA
don’t care
(L/H)
don’t care
(L/H)
(x=1,2)
Figure 55. Writing to RAM at Consecutive Address Locations (SPI)
CSN
SI
SCLK
RDY =
“H”
Command
Address
DATA
Command
Address
DATA
don’tcare
(L/H)
don’tcare
(L/H)
don’tcare
(L/H)
DxRESETN bit
(x=1,2)
Figure 56. Writing to RAM at Random Address Locations (SPI)


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