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UPD48576209F1 Arkusz danych(PDF) 31 Page - Renesas Technology Corp

Numer części UPD48576209F1
Szczegółowy opis  576M-BIT Low Latency DRAM
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Producent  RENESAS [Renesas Technology Corp]
Strona internetowa  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD48576209F1 Arkusz danych(HTML) 31 Page - Renesas Technology Corp

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µµµµPD48576209F1, µµµµPD48576218F1, µµµµPD48576236F1
R10DS0256EJ0101 Rev. 1.01
Page 31 of 53
Jan. 15, 2016
2.13 On-Die Termination
On-die termination (ODT) is enabled by setting A9 to “1” during an MRS command. With ODT on, all the DQs and
DM are terminated to VTT with a resistance RTT. The command, address, and clock signals are not terminated. Figure 2-
20
below shows the equivalent circuit of a DQ receiver with ODT. ODTs are dynamically switched off during READ
commands and are designed to be off prior to the
µPD48576209/18/36F1 driving the bus. Similarly, ODTs are designed
to switch on after the
µPD48576209/18/36F1 has issued the last piece of data.
Table 2-5. On-Die Termination DC Parameters
Description
Symbol
MIN.
MAX.
Units
Note
Termination voltage
VTT
0.95 x VREF
1.05 x VREF
V
1, 2
On-Die termination
RTT
125
185
3
Notes 1.
All voltages referenced to VSS (GND).
2.
VTT is expected to be set equal to VREF and must track variations in the DC level of VREF.
3.
The RTT value is measured at 95°C TC.
Figure 2-20. On- Die Termination-Equivalent Circuit
Figure 2-21. READ Burst with ODT: BL=2, Configuration 1
Remark
RD
: READ command
A/BAp : Address A of bank p
RL
: READ latency
Qpq
: Data q from bank p
VTT
RTT
sw
Receiver
DQ
CK#
CK
COMMAND
0
1
2
3
4
5
6
7
8
ADDRESS
RL = 4
DQ
QKx
QKx#
Q0a
Q1a
Q0b
Q1b
Q2a Q2b
RD
A
BA0
A
BA1
A
BA2
RD
RD
NOP
NOP
NOP
NOP
NOP
NOP
Don't care
Undefined
ODT
ODT ON
QVLD
ODT OFF
ODT ON


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