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HT45R4U Arkusz danych(PDF) 70 Page - Holtek Semiconductor Inc |
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HT45R4U Arkusz danych(HTML) 70 Page - Holtek Semiconductor Inc |
70 / 105 page Rev. 1.10 70 �a��� 1�� �01� Rev. 1.10 71 �a��� 1�� �01� HT45R4U TinyPowerTM A/D Type e-Banking ASSP OTP MCU with LCD Watchdog Time-out Reset during Power Down TheWatchdogtime-outResetduringPowerDownisalittledifferentfromotherkindsofreset.Most oftheconditionsremainunchangedexceptthattheProgramCounterandtheStackPointerwillbe clearedto″0″andtheTOflagwillbesetto″1″.RefertotheA.C.CharacteristicsfortSSTdetails. WD T Ti me - out SS T Ti me - out t SST WDT Time-out Reset during Power Down Timing Chart Reset Initial Conditions Thedifferenttypesofresetdescribedaffecttheresetflagsindifferentways.Theseflags,knownas PDFandTOarelocatedinthestatusregisterandarecontrolledbyvariousmicrocontrolleroperations, suchasthePowerDownfunctionorWatchdogTimer.Theresetflagsareshowninthetable: TO PDF RESET Conditions 0 0 RES �eset du�ing powe�-on u u RES o� LVR �eset du�ing no�mal ope�ation 1 u WDT time-out �eset du�ing no�mal ope�ation 1 1 WDT time-out �eset du�ing Powe� Down Note:″u″standsforunchanged Thefollowingtableindicatesthewayinwhichthevariouscomponentsofthemicrocontrollerare affectedafterapower-onresetoccurs. Item Condition After RESET P�og�am Counte� Reset to ze�o Inte��upts All inte��upts will be disabled WDT Clea� afte� �eset� WDT begins �ounting Time�/Event Counte� Time� Counte� will be tu�ned off P�es�ale� T�e Time� Counte� P�es�ale� will be �lea�ed Input/Output Po�ts I/O po�ts will be setup as inputs Sta�k Pointe� Sta�k Pointe� will point to t�e top of t�e sta�k Thedifferentkindsofresetsallaffecttheinternalregistersofthemicrocontrollerindifferentways. Toensurereliablecontinuationofnormalprogramexecutionafteraresetoccurs,itisimportantto knowwhatconditionthemicrocontrollerisinafteraparticularresetoccurs.Thefollowingtable describeshoweachtypeofresetaffectseachofthemicrocontrollerinternalregisters.Notethatwhere morethanonepackagetypeexiststhetablewillreflectthesituationforthelargerpackagetype. Register Reset (Power-On) RES Reset (Normal Oper.) WDT Time-out (Normal Oper.) WDT Time-out (HALT)* �P0 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu �P1 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu BP --0- 0000 --0- 0000 --0- 0000 --u- uuuu ACC xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu PCL 0000 0000 0000 0000 0000 0000 uuuu uuuu TBLP xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu TBLH xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu TBHP --xx xxxx --uu uuuu --uu uuuu --uu uuuu STATUS --00 xxxx --uu uuuu --1u uuuu --1 1 uuuu INTC0 -000 0000 -000 0000 -000 0000 -uuu uuuu LVDC --00 -000 --00 -000 --00 -000 --uu -uuu |
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