Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD7813 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części AD7813
Szczegółowy opis  2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7813 Arkusz danych(HTML) 8 Page - Analog Devices

Back Button AD7813 Datasheet HTML 4Page - Analog Devices AD7813 Datasheet HTML 5Page - Analog Devices AD7813 Datasheet HTML 6Page - Analog Devices AD7813 Datasheet HTML 7Page - Analog Devices AD7813 Datasheet HTML 8Page - Analog Devices AD7813 Datasheet HTML 9Page - Analog Devices AD7813 Datasheet HTML 10Page - Analog Devices AD7813 Datasheet HTML 11Page - Analog Devices AD7813 Datasheet HTML 12Page - Analog Devices  
Zoom Inzoom in Zoom Outzoom out
 8 / 12 page
background image
AD7813
–7–
REV. C
During the acquisition phase the sampling capacitor must be
charged to within a 1/2 LSB of its final value. The time it takes
to charge the sampling capacitor (TCHARGE) is given by the
following formula:
TCHARGE = 7.6
× (R2 + 125 Ω) × 3.5 pF
For small values of source impedance, the settling time associ-
ated with the sampling circuit (100 ns) is, in effect, the acquisi-
tion time of the ADC. For example, with a source impedance
(R2) of 10
Ω the charge time for the sampling capacitor is
approximately 4 ns. The charge time becomes significant for
source impedances of 2 k
Ω and greater.
AC Acquisition Time
In ac applications it is recommended to always buffer analog
input signals. The source impedance of the drive circuitry must
be kept as low as possible to minimize the acquisition time of
the ADC. Large values of source impedance will cause the
THD to degrade at high throughput rates.
ADC TRANSFER FUNCTION
The output coding of the AD7813 is straight binary. The
designed code transitions occur at successive integer LSB values
(i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = VREF/1024. The
ideal transfer characteristic for the AD7813 is shown in Figure 7.
000...000
0V
ANALOG INPUT
111...111
000...001
000...010
111...110
111...000
011...111
1LSB
+VREF–1LSB
1LSB = VREF/1024
Figure 7. Transfer Characteristic
POWER-UP TIMES
The AD7813 has a 1.5
µs power-up time. When VDD is first
connected, the AD7813 is in a low current mode of operation.
In order to carry out a conversion the AD7813 must first be
powered up. The ADC is powered up by a rising edge on an
internally generated CONVST signal, which occurs as a result
of a rising edge on the external CONVST pin. The rising edge
of the external CONVST signal initiates a 1.5
µs pulse on the
internal CONVST signal. This pulse is present to ensure the
part has enough time to power up before a conversion is initi-
ated, as a conversion is initiated on the falling edge of gated
CONVST. See Timing and Control section. Care must be taken
to ensure that the CONVST pin of the AD7813 is logic low
when VDD is first applied.
When operating in Mode 2, the ADC is powered down at the
end of each conversion and powered up again before the next
conversion is initiated. (See Figure 8.)
t POWER-UP
1.5 s
t POWER-UP
1.5 s
t POWER-UP
1.5 s
MODE 1
MODE 2
VDD
EXT
CONVST
INT
CONVST
VDD
EXT
CONVST
INT
CONVST
Figure 8. Power-Up Times
POWER VS. THROUGHPUT RATE
By operating the AD7813 in Mode 2, the average power con-
sumption of the AD7813 decreases at lower throughput rates.
Figure 9 shows how the Automatic Power-Down is implemented
using the external CONVST signal to achieve the optimum
power performance for the AD7813. The AD7813 is operated
in Mode 2, and the duration of the external CONVST pulse is
set to be equal to or less than the power-up time of the device.
As the throughput rate is reduced, the device remains in its power-
down state longer and the average power consumption over time
drops accordingly.
EXT
CONVST
INT
CONVST
POWER-DOWN
t POWER-UP
1.5 s
t CONVERT
2.3 s
t CYCLE
100 s @ 10kSPS
Figure 9. Automatic Power-Down
For example, if the AD7813 is operated in a continuous sam-
pling mode, with a throughput rate of 10 kSPS, the power con-
sumption is calculated as follows. The power dissipation during
normal operation is 10.5 mW, VDD = 3 V. If the power-up time
is 1.5
µs and the conversion time is 2.3 µs, the AD7813 can then
be said to dissipate 10.5 mW for 3.8
µs (worst-case) during each
conversion cycle. If the throughput rate is 10 kSPS, the cycle
time is 100
µs and the average power dissipated during each
cycle is (3.8/100)
× (10.5 mW) = 400 µW.


Podobny numer części - AD7813

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7813 AD-AD7813 Datasheet
185Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. B
AD7813 AD-AD7813 Datasheet
174Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. C
AD7813YN AD-AD7813YN Datasheet
185Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. B
AD7813YNZ AD-AD7813YNZ Datasheet
174Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. C
AD7813YR AD-AD7813YR Datasheet
185Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. B
More results

Podobny opis - AD7813

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7813 AD-AD7813_15 Datasheet
194Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. C
AD7813YNZ AD-AD7813YNZ Datasheet
174Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. C
AD7813 AD-AD7813 Datasheet
185Kb / 11P
   2.7 V to 5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
REV. B
AD7819 AD-AD7819_15 Datasheet
156Kb / 11P
   2.7 V to 5.5 V, 200 kSPS 8-Bit Sampling ADC
REV. B
AD7819 AD-AD7819_17 Datasheet
187Kb / 12P
   2.7 V to 5.5 V, 200 kSPS 8-Bit Sampling ADC
AD7819YRZ AD-AD7819YRZ Datasheet
146Kb / 11P
   2.7 V to 5.5 V, 200 kSPS 8-Bit Sampling ADC
REV. B
AD7819 AD-AD7819 Datasheet
146Kb / 11P
   2.7 V to 5.5 V, 200 kSPS 8-Bit Sampling ADC
REV. A
AD7811YRUZ AD-AD7811YRUZ Datasheet
211Kb / 19P
   2.7 V to 5.5 V, 350 kSPS, 10-Bit 4-/8-Channel Sampling ADCs
REV. B
AD7811 AD-AD7811 Datasheet
200Kb / 19P
   2.7 V to 5.5 V, 350 kSPS, 10-Bit 4-/8-Channel Sampling ADCs
REV. B
AD7812YRUZ AD-AD7812YRUZ Datasheet
211Kb / 19P
   2.7 V to 5.5 V, 350 kSPS, 10-Bit 4-/8-Channel Sampling ADCs
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com