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AD7863ARS-10 Arkusz danych(PDF) 11 Page - Analog Devices |
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AD7863ARS-10 Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 25 page AD7863 Rev. B | Page 10 of 24 CIRCUIT DESCRIPTION ANALOG INPUT SECTION The AD7863 is offered as three part types: the AD7863-10, which handles a ±10 V input voltage range, the AD7863-3, which handles input voltage range ±2.5 V and the AD7863-2, which handles a 0 V to 2.5 V input voltage range. 2.5V REFERENCE MUX R2 R1 R3 TO INTERNAL COMPARATOR TRACK/ HOLD VREF VAX AGND AD7863-10/AD7863-3 2kΩ TO ADC REFERENCE CIRCUITRY Figure 5. AD7863-10/AD7863-3 Analog Input Structure Figure 5 shows the analog input section for the AD7863-10 and AD7863-3. The analog input range of the AD7863-10 is ±10 V into an input resistance of typically 9 kΩ. The analog input range of the AD7863-3 is ±2.5 V into an input resistance of typically 3 kΩ. This input is benign, with no dynamic charging currents because the resistor stage is followed by a high input impedance stage of the track-and-hold amplifier. For the AD7863-10, R1 = 8 kΩ, R2 = 2 kΩ and R3 = 2 kΩ. For the AD7863-3, R1 = R2 = 2 kΩ and R3 is open circuit. For the AD7863-10 and AD7863-3, the designed code transitions occur on successive integer LSB values (that is, 1 LSB, 2 LSBs, 3 LSBs . . .). Output coding is twos complement binary with 1 LSB = FS/16,384. The ideal input/output transfer function for the AD7863-10 and AD7863-3 is shown in Table 5. Table 5. Ideal Input/Output Code (AD7863-10/AD7863-3) Analog Input1 Digital Output Code Transition +FSR/2 − 1 LSB2 011 . . . 110 to 011 . . . 111 +FSR/2 − 2 LSBs 011 . . . 101 to 011 . . . 110 +FSR/2 − 3 LSBs 011 . . . 100 to 011 . . . 101 GND + 1 LSB 000 . . . 000 to 000 . . . 001 GND 111 . . . 111 to 000 . . . 000 GND − 1 LSB 111 . . . 110 to 111 . . . 111 −FSR/2 + 3 LSBs 100 . . . 010 to 100 . . . 011 −FSR/2 + 2 LSBs 100 . . . 001 to 100 . . . 010 −FSR/2 + 1 LSB 100 . . . 000 to 100 . . . 001 1FSR is full-scale range = 20 V (AD7863-10) and = 5 V (AD7863-3) with VREF = 2.5 V. 21 LSB = FSR/16,384 = 1.22 mV (AD7863-10) and 0.3 mV (AD7863-3) with VREF = 2.5 V. The analog input section for the AD7863-2 contains no biasing resistors and the VAX/BX pin drives the input directly to the multiplexer and track-and-hold amplifier circuitry. The analog input range is 0 V to 2.5 V into a high impedance stage with an input current of less than 100 nA. This input is benign, with no dynamic charging currents. Once again, the designed code transitions occur on successive integer LSB values. Output coding is straight (natural) binary with 1 LSB = FS/16,384 = 2.5 V/16,384 = 0.15 mV. Table 6 shows the ideal input/output transfer function for the AD7863-2. Table 6. Ideal Input/Output Code (AD7863-2) Analog Input1 Digital Output Code Transition +FSR − 1 LSB2 111 . . . 110 to 111 . . . 111 +FSR − 2 LSB 111 . . . 101 to 111 . . . 110 +FSR − 3 LSB 111 . . . 100 to 111 . . . 101 GND + 3 LSB 000 . . . 010 to 000 . . . 011 GND + 2 LSB 000 . . . 001 to 000 . . . 010 GND + 1 LSB 000 . . . 000 to 000 . . . 001 1FSR is full-scale range = 2.5 V for AD7863-2 with VREF = 2.5 V. 21 LSB = FSR/16,384 = 0.15 mV for AD7863-2 with VREF = 2.5 V. OFFSET AND FULL-SCALE ADJUSTMENT In most digital signal processing (DSP) applications, offset and full-scale errors have little or no effect on system performance. Offset error can always be eliminated in the analog domain by ac coupling. Full-scale error effect is linear and does not cause problems as long as the input signal is within the full dynamic range of the ADC. Invariably, some applications require that the input signal span the full analog input dynamic range. In such applications, offset and full-scale error have to be adjusted to zero. Figure 6 shows a typical circuit that can be used to adjust the offset and full-scale errors on the AD7863 (VA1 on the AD7863-10 version is shown for example purposes only). Where adjustment is required, offset error must be adjusted before full-scale error. This is achieved by trimming the offset of the op amp driving the analog input of the AD7863 while the input voltage is ½ LSB below analog ground. The trim procedure is as follows: apply a voltage of −0.61 mV (−½ LSB) at V1 in Figure 6 and adjust the op amp offset voltage until the ADC output code flickers between 11 1111 1111 1111 and 00 0000 0000 0000. R2 500Ω *ADDITIONAL PINS OMITTED FOR CLARITY. VA1 AGND AD7863* R1 10kΩ R3 10kΩ R5 10kΩ R4 10kΩ V1 INPUT RANGE = ±10V Figure 6. Full-Scale Adjust Circuit |
Podobny numer części - AD7863ARS-10 |
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Podobny opis - AD7863ARS-10 |
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