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ATWINC3400 Arkusz danych(PDF) 19 Page - ATMEL Corporation |
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ATWINC3400 Arkusz danych(HTML) 19 Page - ATMEL Corporation |
19 / 35 page [PRELIMINARY DATASHEET ] Atmel-42396C-SmartConnect-ATWINC3400_Preliminary-Datasheet_07/2015 1 9 19 Pin name Pin # Pull Mux0 Mux1 Mux2 Mux3 Mux4 Mux5 Mux6 GPIO_20 39 Down GPIO_20 I_WAKEUP IRQN 40 Up GPIO_2 O_IRQN I_WIFI_UAR T_RXD O_BT_UAR T1_RTS GPIO_21 41 Up GPIO_21 I_RTC_CLK I_WIFI_UAR T_RXD O_WIFI_UA RT_TXD O_BT_UAR T1_RTS IO_I2C_MA STER_SCL HOST_WAK EUP 42 Up GPIO_0 I_WAKEUP O_WIFI_UA RT_TXD IO_I2C_MA STER_SDA 9.1 I2C Slave Interface The I2C Slave interface, used primarily for control by the host processor, is a two-wire serial interface consisting of a serial data line (SDA) on Pin 16 (GPIO14) and a serial clock line (SCL) on Pin 17 (GPIO13). I2C Slave responds to the seven bit address value 0x60. The ATWILC3400 I2C supports I2C bus Version 2.1 - 2000 and can operate in standard mode (with data rates up to 100Kb/s) and fast mode (with data rates up to 400Kb/s). The I2C Slave is a synchronous serial interface. The SDA line is a bidirectional signal and changes only while the SCL line is low, except for STOP, START, and RESTART conditions. The output drivers are open-drain to perform wire-AND functions on the bus. The maximum number of devices on the bus is limited by only the maximum capacitance specification of 400pF. Data is transmitted in byte packages. For specific information, refer to the Philips Specification entitled “The I2C -Bus Specification, Version 2.1”. Figure 9-1. I2C Slave Timing Diagram tHL SDA SCL tHDSTA tWL tWH tSUDAT tPR tHDDAT tPR tPR tLH tHL tLH tSUSTO tBUF tSUSTA fSCL |
Podobny numer części - ATWINC3400 |
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Podobny opis - ATWINC3400 |
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