Zakładka z wyszukiwarką danych komponentów |
|
ES2828S Arkusz danych(PDF) 4 Page - List of Unclassifed Manufacturers |
|
ES2828S Arkusz danych(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 6 page 4 SAM0402-050301 ESS Technology, Inc. ES2898/ES2828 PRODUCT BRIEF PIN DESCRIPTIONS RFS1 67 I/O Receive frame for serial port 1. Can be generated either internally or externally. This signal is asserted one clock before data is sent on the DR1 pin. TFS1 68 I/O Transmit frame for serial port 1. Can be generated either internally or externally. DR1 69 I Data receive pin for serial port 1. DT1 70 O Data transmit pin for serial port 1. SCLK0 72 I/O One of two serial clock inputs. This clock can be generated either by the ES2898 or by the ES2828. RFS0 73 I/O Receive frame for serial port 0. Can be generated either internally or externally. This signal is asserted one clock before data is sent on the DR0 pin. TFS0 74 I/O Transmit frame for serial port 0. Can be generated either internally or externally. DR0 75 I Data receive pin for serial port 0. DT0 76 O Data transmit pin for serial port 0. TEST / PF9 78 I Used during device test. Tie this pin to ground through a 4.7k Ω resistor. RING_IN 79 I Used for ring detect input during the D3cold state to drive the device back to its default power-up state. VAUX 80 I Power to device during implementation of the D3cold state required by PCI Power Management Interface specification. PME# 81 O PME# output. VAUXP 82 I VAUX support detection input. VAUXP pin is driven high to indicate that ACPI is supported with D3cold state. No support when driven low. CLK 84 I PCI bus input clock. Functions as PCI CLK pin and operates at 33 MHz. INTA# 86 O Interrupt A. Used to request an interrupt from the PCI bus. PAR 87 I/O Parity pin. PAR is stable and valid one clock after the address phase. For data phases, PAR is stable and valid one clock after either IRDY# is asserted on a write transaction or TRDY# is asserted on a read transaction. FRAME# 89 I/O Cycle frame. FRAME# is driven by the current master to indicate the beginning and duration of an access. FRAME# is asserted to indicate the start of a bus transaction. When FRAME# is deasserted, the transaction is in the final data phase or has been completed. IRDY# 91 I/O Initiator ready. IRDY# is used in conjuction with TRDY# and indicates the bus master’s ability to complete the current data phase of a transaction. During a write transaction, IRDY# indicates that valid data is present on AD[16:31] and AD[0:15]. During a read transaction, IRDY# indicates that master is prepared to accept data. Wait cycles are inserted until both IRDY# and TRDY# are asserted together. STOP# 92 I/O Stop. STOP# indicates the current target is requesting the master to stop the current transaction. TRDY# 95 O Target ready. TRDY# is used in conjuction with IRDY# and indicates the bus master’s ability to complete the current data phase of a transaction. During a write transaction, TRDY# indicates that valid data is present on AD[16:31] and AD[0:15]. During a read transaction, TRDY# indicates that master is prepared to accept data. Wait cycles are inserted until both TRDY# and IRDY# are asserted together. IDSEL 96 O Initialization device select. IDSEL is used as a chip select during configuration read and write transactions. DEVSEL# 97 O Device select. When actively driven, DEVSEL# indicates that the driving device has decoded its address as the target of the current access. As an input, DEVSEL# indicates whether any device on the bus has been selected. RESET# 88 I Active-low ES2898 reset input. DAA_PM 94 O DAA power control output. Table 1 ES2898 Pin Descriptions (Continued) Names Pin Numbers I/O Definitions |
Podobny numer części - ES2828S |
|
Podobny opis - ES2828S |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |