Zakładka z wyszukiwarką danych komponentów |
|
CDC960DLR Arkusz danych(PDF) 6 Page - Texas Instruments |
|
CDC960DLR Arkusz danych(HTML) 6 Page - Texas Instruments |
6 / 10 page CDC960 200MHz CLOCK SYNTHESIZER/DRIVER WITH SPREAD SPECTRUM CAPABILITY AND DEVICE CONTROL INTERFACE SCAS675 – APRIL 2002 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION VDDA 43 P Analog VDD: Connected to 3.3-V power supply through filter. Used to supply the main CPU-PLL on the chip VDDF 32 P Analog VDD for 48-MHz PLL: Connected to 3.3-V power supply through filter. Used to supply the 48-MHz PLL on the chip XIN 3 I Crystal input – 14.318 MHz Crystal Connection or External Reference: Reference crystal input or external reference clock input. This pin includes an internal 36-pF load capacitance to eliminate the need for an external load capacitor. XOUT 4 O Crystal output – 14.318 MHz Crystal Connection: Reference crystal feedback. This output includes an internal 36-pF load capacitance to eliminate the need for an external load capacitor. 24/48_SEL & FDC 28 I/O 3.3-V super I/O clock output: The super I/O clock can be strapped for 24 MHz or 48 MHz. This input has a 150-k Ω internal pullup resistor. Low = 48-MHz output, High = 24-MHz output connecting SCLK and SDATA to 5-V SMBus signals SCLK and SDATA of CDC960 have been designed to work within a 3.3-V supply voltage environment only. In order to connect SCLK and SDATA to a 5-V SMBus configuration, external circuitry is required. A simple and inexpensive solution is to use clamping diodes. Two approaches are recommended for this solution: 1. Using Zener diode to clamp to GND in reverse-biased direction VO 150 k Ω SCLK OR SDATA Driver R1 D1 VIO SCLK or SDATA CDC960 3.3 V Figure 1. SCLK SDATA Connection to 5-V SMBus Using Zener Diode Zener diode D1 in Figure 1 is chosen such that the Zener voltage (VZK) cannot exceed 300 mV above VDD of the CDC960. The minimum value of VZK must be greater than 2.1 V to meet minimum requirement for VIH of the CDC960. The value of R1 is chosen to satisfy requirements both for IOH of the driver of SCLK and SDATA and for VOL and IOL of SDATA of CDC960. I OH v V O * V IO R1 ) R S (For the driver of SCLK and SDATA. R S is the source driver impedance.) 2mA v 0.8 V R1 ) Z O v 6 mA (For a SDATA of CDC960, 25 W t Z O t 47 W) R1 ) Z O 1.75 mA t 0.4 V (For a SDATA of CDC960, 25 W t Z O t 47 W) (1) (2) (3) |
Podobny numer części - CDC960DLR |
|
Podobny opis - CDC960DLR |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |