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AD8452ASTZ-RL Arkusz danych(PDF) 7 Page - Analog Devices |
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AD8452ASTZ-RL Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 35 page AD8452 Data Sheet Rev. 0 | Page 6 of 34 Parameter Test Conditions/Comments Min Typ Max Unit ZERO CROSSING DETECTION (ZCD) ZCD Threshold Offset (VCLP + VCLN)/2, for common-mode voltage (CMV) = 0 V to 8 V 0 mV VREG Low Dropout (LDO) Regulator Output Voltage VIN = 6 V to 60 V, no external load 4.9 5 5.1 V Load Regulation VIN = 6 V, IOUT = 0 mA to 5 mA 4.9 5 5.1 V PWM DRIVE LOGIC SIGNALS (DH/DL) DL Drive Voltage No load VREG V DH Drive Voltage No load VREG V DL and DH Sink Resistance IDL = 10 mA 1.4 2.6 Ω DL and DH Source Resistance IDL = 10 mA 1.4 2.6 Ω DL and DH Pull-Down Resistor 0.5 1 1.5 MΩ THERMAL SHUTDOWN (TSD) TSD Threshold Rising 150 °C Falling 125 °C 1 The DMAX and SCFG current matching specification is calculated by taking the absolute value of the difference between the measured ISCFG and IDMAX currents, dividing them by the 11 µA typical value, and multiplying this result by 100. DMAX and SCFG current matching (%) = (ISCFG – IDMAX/11 µA) × 100 DIGITAL INTERFACE SPECIFICATIONS Table 3. Parameter Test Conditions/Comments Min Typ Max Unit DIGITAL INTERFACE, MODE INPUT MODE pin MODE Threshold Rising 1.2 1.4 V MODE Threshold Falling 0.7 1.0 V MODE Switching Time 400 ns PRECISION ENABLE LOGIC (EN) Maximum EN Pin Voltage 60 V EN Threshold Rising 1.26 1.4 V EN Threshold Falling 1.1 1.2 V EN Pin Current VEN = 5 V, internal pull-down 0.25 2 µA FAULT Active low input Maximum FAULT Pin Voltage 60 V FAULT Threshold Rising 1.2 1.5 V FAULT Threshold Falling 0.7 1.0 V FAULT Pin Current VFAULT = 5 V, internal 8.5 MΩ pull- down resistor 0.5 2 µA |
Podobny numer części - AD8452ASTZ-RL |
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Podobny opis - AD8452ASTZ-RL |
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