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AD9670BBCZ Arkusz danych(PDF) 3 Page - Analog Devices |
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AD9670BBCZ Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 53 page AD9670 Data Sheet Rev. A | Page 2 of 52 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications..................................................................................... 4 AC Specifications.......................................................................... 4 Digital Specifications ................................................................... 7 Switching Specifications .............................................................. 8 Timing Diagrams.......................................................................... 9 Absolute Maximum Ratings.......................................................... 11 Thermal Impedance ................................................................... 11 ESD Caution................................................................................ 11 Pin Configuration and Function Descriptions........................... 12 Typical Performance Characteristics ........................................... 15 TGC Mode Characteristics ....................................................... 15 CW Doppler Mode Characteristics ......................................... 19 Theory of Operation ...................................................................... 20 TGC Operation........................................................................... 20 Analog Test Signal Generation ................................................. 33 CW Doppler Operation............................................................. 33 Digital Demodulator/Decimator.................................................. 35 Vector Profile .............................................................................. 35 RF Decimator.............................................................................. 36 Baseband Demodulator and Decimator.................................. 37 Digital Test Waveforms.............................................................. 38 Digital Block Power Saving Scheme ........................................ 38 Serial Port Interface (SPI).............................................................. 39 Hardware Interface..................................................................... 39 Memory Map .................................................................................. 41 Reading the Memory Map Table.............................................. 41 Reserved Locations .................................................................... 41 Default Values ............................................................................. 41 Logic Levels................................................................................. 41 Recommended Startup Sequence ............................................ 41 Memory Map Register Descriptions........................................ 51 Outline Dimensions ....................................................................... 52 Ordering Guide .......................................................................... 52 REVISION HISTORY 2/16—Revision A: Initial Version |
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