TC58256AFT datasheet(5/33 Pages) TOSHIBA

Numer części	TC58256AFT

Szczegółowy opis	256-MBIT (32M X 8 BITS) CMOS NAND E2PROM

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Producent	TOSHIBA [Toshiba Semiconductor]

Strona internetowa	http://www.semicon.toshiba.co.jp/eng

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TC58256AFT

2001-05-30

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Note: (1) CE High to Ready time depends on the pull-up resistor tied to the

BY

/

RY

pin.

(Refer to Application Note (9) toward the end of this document.)

(2) Sequential Read is terminated when tCEH is greater than or equal to 100 ns. If the RE to CE delay

is less than 30 ns,

BY

/

RY

signal stays Ready.

PROGRAMMING AND ERASING CHARACTERISTICS (Ta

==== 0° to 70°C, VCC ==== 2.7 V to 3.6 V)

SYMBOL

PARAMETER

MIN

TYP.

MAX

UNIT

NOTES

tPROG

Programming Time

¾

200 to 300

1000

ms

N

Number of Programming Cycles on Same

Page

¾

3

(1)

tBERASE

Block Erasing Time

¾

2

10

ms

(1): Refer to Application Note (12) toward the end of this document.

: 0 to 30 ns

® Busy signal is not output.

A

CE

RE

tCEH ³ 100 ns

*

525

Busy

BY

/

RY

*: VIH or VIL

A

526

527

tCRY

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