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ADSP-219212MKST160 Arkusz danych(PDF) 5 Page - Analog Devices |
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ADSP-219212MKST160 Arkusz danych(HTML) 5 Page - Analog Devices |
5 / 40 page –5– REV. 0 ADSP-2192M Table 2 shows the interrupt vector and DSP-to-DSP semaphores at reset of each of the peripheral interrupts. The peripheral inter- rupt’s position in the IMASK and IRPTL register and its vector address depend on its priority level, as shown in Table 2. Figure 2. ADSP-2192M Internal/External Memory, Boot Memory, and I/O Memory Maps SHARED RAM (16 4K) DATA RAM BLO CK3 (16 16K) DATA RAM BLO CK2 (16 16K) DATA RAM BLO CK1 (16 16K) RESERVED 0x00 0000 0x00 3FFF 0x00 4000 0x00 8000 0x00 C000 0x01 0000 0x01 4FFF 0x01 5000 0x01 FFFF ADDRESS DATA RAM BLO CK0 (16 16K) 0x00 7FFF 0x00 BFFF 0x00 FFFF PROG RAM RAM (24 16K) PROGRAM RO M 24 4K 0x01 3FFF 0x01 4000 0x02 0000 0x02 0FFF DSP P0 MEMORY MAP PAGE 2 PAGE 1 PAGE 0 SHARED DSP I/O MAPPED REGISTERS PAGES 0 255 (16 256) 0x00 00 0xFF FF ADDRESS SHARED RAM (16 4K) DATA RAM BLO CK1 (16 16K) RESERVED 0x00 0000 0x00 3FF F 0x00 4000 0x00 8000 0x01 0000 0x01 4FF F 0x01 5000 0x01 FFFF ADDRESS DATA RAM BLO CK0 (16 16K) 0x00 7FF F 0x00 FFFF PROG RAM RAM (24 16K) PROGRAM ROM 24 4K 0x01 3FF F 0x01 4000 0x02 0000 0x02 0FF F DSP P1 MEMORY MAP RESERVED PAGE 2 PAGE 1 PAGE 0 SAME Table 1. DSP-to-DSP Semaphores Register Table Flag Bit Direction Function 0 Output DSP–DSP Semaphore 0 1 Output DSP–DSP Semaphore 1 2 Output DSP–DSP Interrupt 3 Reserved 4 Reserved 5 Reserved 6 Reserved 7 Output Register Bus Lock 8 Input DSP–DSP Semaphore 0 9 Input DSP–DSP Semaphore 1 10 Input DSP–DSP Interrupt 11 Input Reserved 12 Input AC’97 Register–PDC Bus Access Status 13 Input PDC Interface Busy Status (write from DSP pending) 14 Input Reserved 15 Input Register Bus Lock Status Table 2. Vector Table Bit Priority Interrupt Vector Address Offset1 0 1 Reset (non-maskable) 0x00 12 Power-Down (non- maskable) 0x04 2 3 Kernel interrupt (single step) 0x08 3 4 Stack Status 0x0C 4 5 Mailbox 0x10 56 Timer 0x14 6 7 GPIO 0x18 7 8 PCI Bus Master 0x1C 89 DSP–DSP 0x20 9 10 FIFO0 Transmit 0x24 10 11 FIFO0 Receive 0x28 11 12 FIFO1 Transmit 0x2C 12 13 FIFO1 Receive 0x30 13 14 Reserved 0x34 14 15 Reserved 0x38 15 16 AC’97 Frame 0x3C 1The interrupt vector address values are represented as offsets from address 0x01 0000. This address corresponds to the start of Program Memory in DSP P0 and P1. |
Podobny numer części - ADSP-219212MKST160 |
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Podobny opis - ADSP-219212MKST160 |
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