REV. 0

ADF7011

–3–

Parameter

Min

Typ

Max

Unit

PHASE-LOCKED LOOP

VCO Gain 433 MHz/868 MHz

40/80

MHz/V @ 868 MHz

Phase Noise (In-Band)

–81

dBc/Hz @ 5 kHz offset

Phase Noise (Out-of-Band)

6

–90

dBc/Hz @ 1 MHz offset

Phase Noise (In-Band)

–83

dBc/Hz @ 5 kHz offset

Phase Noise (Out-of-Band)

8

–95

dBc/Hz @ 1 MHz offset

100 kHz loop BW

Spurious

9, 10

47–74, 87.5–118, 174–230, 470–862 MHz

–54

dBm

9 kHz – 1 GHz

–36

dBm

Above 1 GHz

–30

dBm. Assumes external harmonic filter.

Harmonics

10

Second Harmonic, 433 MHz/868 MHz

–23/–28

–20/–23

dBc

Third Harmonic, 433 MHz/868 MHz

–25/–29

–22/–25

dBc

Other Harmonics, 433 MHz/868 MHz

–26/–40

–23/–35

dBc

REFERENCE INPUT

Crystal Reference

433 MHz

1.7

22.1184

MHz

868 MHz

3.4

22.1184

MHz

External Oscillator

Frequency

3.4

40

MHz

Input Level, High Voltage

V

Input Level, Low Voltage

V

FREQUENCY COMPENSATION

Pull In Range of Register

1

100

ppm

PA CHARACTERISTICS

RF Output Impedance

868 MHz

16 – j33

433 MHz

25 – j2.6

TIMING INFORMATION

Chip Enabled to Regulator Ready

10

50

200

µs

4 MHz Crystal

1.8

ms

22.1184 MHz Crystal

2.2

ms

–40

+85

C

NOTES

Mod Deviation )/2

GFSK Frequency Deviation = (PFD Frequency

2

levels to >10 dBm at both 433 MHz and 868 MHz

Recommended PFD frequencies are 4.42368 MHz (22.1184/5) for 868 MHz, and 4 MHz for 433 MHz operation. Compliance for higher output powers will require

an external filter. See Applications section.

Specifications subject to change without notice.