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ADF4154BCP Arkusz danych(PDF) 1 Page - Analog Devices

Numer części ADF4154BCP
Szczegółowy opis  Fractional-N Frequency Synthesizer
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Fractional-N Frequency Synthesizer
ADF4154
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
FEATURES
RF bandwidth 500 MHz to 4 GHz
2.7 V to 3.3 V power supply
Separate VP allows extended tuning voltage
Programmable dual-modulus prescaler 4/5, 8/9
Programmable charge pump currents
3-wire serial interface
Digital lock detect
Power-down mode
Pin compatible with the ADF4110/ADF4111/
ADF4112/ADF4113, ADF4106 and ADF4153
Programmable modulus on fractional-N synthesizer
Trade-off noise versus spurious performance
Fast-lock mode with built-in timer
APPLICATIONS
CATV equipment
Base stations for mobile radio (GSM, PCS, DCS,
CDMA, WCDMA)
Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANs
Communications test equipment
GENERAL DESCRIPTION
The ADF4154 is a fractional-N frequency synthesizer that
implements local oscillators in the up conversion and down
conversion sections of wireless receivers and transmitters. It
consists of a low noise digital phase frequency detector (PFD),
a precision charge pump, and a programmable reference divider.
There is a Σ-Δ based fractional interpolator to allow program-
mable fractional-N division. The INT, FRAC, and MOD regis-
ters define an overall N divider (N = (INT + (FRAC/MOD))).
In addition, the 4-bit reference counter (R counter) allows
selectable REFIN frequencies at the PFD input. A complete
phase-locked loop (PLL) can be implemented if the synthesizer
is used with an external loop filter and a voltage controlled
oscillator (VCO).
A key feature of the ADF4154 is the fast-lock mode with a built-
in timer. The user can program a predetermined count-down
time value so that the PLL will remain in wide bandwidth mode,
instead of having to control this time externally.
Control of all on-chip registers is via a simple 3-wire interface.
The device operates with a power supply ranging from 2.7 V to
3.3 V, and can be powered down when not in use.
FUNCTIONAL BLOCK DIAGRAM
LOCK
DETECT
FAST-LOCK
SWITCH
N COUNTER
CP
RFCP3 RFCP2 RFCP1
REFERENCE
DATA
LE
24-BIT
DATA
REGISTER
CLOCK
REFIN
AVDD
AGND
VDD
VDD
DGND
RDIV
NDIV
DGND
CPGND
DVDD VP SDVDD
RSET
RFINA
RFINB
OUTPUT
MUX
MUXOUT
+
HIGH Z
PHASE
FREQUENCY
DETECTOR
ADF4154
THIRD ORDER
FRACTIONAL
INTERPOLATOR
MODULUS
REG
FRACTION
REG
INTEGER REG
P = 4/5 OR 8/9
B = 9 BITS; A = 3 BITS
CURRENT
SETTING
×2
DOUBLER
4-BIT
R COUNTER
CHARGE
PUMP
Figure 1.


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