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74LVC1G175GM Arkusz danych(PDF) 7 Page - NXP Semiconductors |
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74LVC1G175GM Arkusz danych(HTML) 7 Page - NXP Semiconductors |
7 / 17 page 9397 750 13762 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 18 October 2004 7 of 17 Philips Semiconductors 74LVC1G175 Single D-type flip-flop with reset; positive-edge trigger 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 0 V; see Figure 8 Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C [1] tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 1.65 V to 1.95 V 1.5 4.9 13.4 ns VCC = 2.3 V to 2.7 V 1.0 3.1 7.1 ns VCC = 2.7 V 1.0 3.2 7.1 ns VCC = 3.0 V to 3.6 V [2] 1.0 3.1 5.7 ns VCC = 4.5 V to 5.5 V 1.0 2.2 4.0 ns propagation delay MR to Q see Figure 7 VCC = 1.65 V to 1.95 V 1.5 4.3 12.9 ns VCC = 2.3 V to 2.7 V 1.0 2.8 7.0 ns VCC = 2.7 V 1.0 3.0 7.0 ns VCC = 3.0 V to 3.6 V [2] 1.0 2.5 5.8 ns VCC = 4.5 V to 5.5 V 1.0 2.0 4.1 ns tW clock pulse width HIGH or LOW see Figure 6 VCC = 1.65 V to 1.95 V 6.2 - - ns VCC = 2.3 V to 2.7 V 2.7 - - ns VCC = 2.7 V 2.7 - - ns VCC = 3.0 V to 3.6 V [2] 2.7 1.3 - ns VCC = 4.5 V to 5.5 V 2.0 - - ns master reset pulse width LOW see Figure 7 VCC = 1.65 V to 1.95 V 6.2 - - ns VCC = 2.3 V to 2.7 V 2.7 - - ns VCC = 2.7 V 2.7 - - ns VCC = 3.0 V to 3.6 V [2] 2.7 1.6 - ns VCC = 4.5 V to 5.5 V 2.0 - - ns trem removal time master reset see Figure 7 VCC = 1.65 V to 1.95 V 1.9 - - ns VCC = 2.3 V to 2.7 V 1.4 - - ns VCC = 2.7 V 1.3 - - ns VCC = 3.0 V to 3.6 V [2] 1.2 0.4 - ns VCC = 4.5 V to 5.5 V 1.0 - - ns tsu set-up time D to CP see Figure 6 VCC = 1.65 V to 1.95 V 2.9 - - ns VCC = 2.3 V to 2.7 V 1.7 - - ns VCC = 2.7 V 1.7 - - ns VCC = 3.0 V to 3.6 V [2] 1.3 0.5 - ns VCC = 4.5 V to 5.5 V 1.1 - - ns |
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