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ADP3166 Arkusz danych(PDF) 6 Page - Analog Devices

Numer części ADP3166
Szczegółowy opis  5-Bit Programmable 2-, 3-, 4-Phase Synchronous Buck Controller
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ADP3166 Arkusz danych(HTML) 6 Page - Analog Devices

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ADP3166
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic
Function
1–5
VID4–VID0
Voltage Identification DAC Inputs. These five pins are pulled up to an internal reference, providing a
logic 1 if left open. When in normal operation mode, the DAC output programs the FB regulation voltage
from 0.8 V to 1.55 V. Leaving VID4 through VID0 open results in the ADP3166 going into a “No CPU”
mode, shutting off its PWM outputs.
6
CROWBAR
Crowbar Output. This logic-level output can be used to control an external device to short the 12 V supply
to ground to protect the CPU from overvoltage if CSREF exceeds 2.1 V.
7
FBRTN
Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage.
8FB
Feedback Input. Error amplifier input for remote sensing of the output voltage. A resistor between this pin
and the output voltage sets the no-load offset point.
9
COMP
Error Amplifier Output and Compensation Point.
10
PWRGD
Power Good Output. Open-drain output that pulls to GND when the output voltage is outside of the
proper operating range.
11
EN
Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs.
12
DELAY
Soft Start Delay and Current Limit Latch-Off Delay Setting Input. A resistor and capacitor connected
between this pin and GND sets the soft start ramp-up time and the overcurrent latch-off delay time.
13
RT
Frequency Setting Resistor Input. An external resistor connected between this pin and GND sets the oscil-
lator frequency of the device.
14
RAMPADJ
PWM Ramp Current Input. A resistor from the converter input voltage to this pin sets the internal PWM ramp.
15
ILIMIT
Current Limit Set Point/Enable Output. A resistor from this pin to GND sets the current limit threshold of
the converter. This pin is actively pulled low when the ADP3166 EN input is low, or when VCC is below
its UVLO threshold to signal to the driver IC that the driver high-side and low-side outputs should go low.
16
CSREF
Current Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current
sense amplifiers and the Power Good and Crowbar functions. This pin should be connected to the com-
mon point of the output inductors.
17
CSSUM
Current Sense Summing Node. Resistors from each switch node to this pin sum the average inductor cur-
rents together to measure the total output current.
18
CSCOMP
Current Sense Compensation Point. A resistor and capacitor from this pin to CSSUM determine the slope
of the load line and the positioning loop response time.
19
GND
Ground. All internal biasing and the logic output signals of the device are referenced to this ground.
20–23
SW4–SW1
Current Balance Inputs. Inputs for measuring the current level in each phase. The SW pins of unused
phases should be grounded.
24–27
PWM4–PWM1 Logic-Level PWM Outputs. Each output is connected to the input of an external MOSFET driver such
as the ADP3413 or ADP3418. Connecting the PWM3 and/or PWM 4 outputs to GND will cause that
phase to turn off, allowing the ADP3166 to operate as a 2-, 3-, or 4-phase controller.
28
VCC
Supply Voltage for the Device.
PIN CONFIGURATION
RU-28
ADP3166
TOP VIEW
(Not to Scale)
VID4
VCC
VID3
PWM1
VID2
PWM2
VID1
PWM3
VID0
PWM4
CROWBAR
SW1
FBRTN
SW2
FB
SW3
COMP
SW4
PWRGD
GND
EN
CSCOMP
DELAY
CSSUM
RT
CSREF
RAMPADJ
ILIMIT
1
2
3
28
27
26
4
8
10
12
14
5
6
7
21
24
23
22
9
11
17
18
19
13
15
16
20
25


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