MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR

MP2122 Rev. 1.02

www.MonolithicPower.com

14

6/12/2017

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 Switching Loss (SW)

 MOSFET Driver Current (DR)

 Supply Current (S)

Based on these parameters, we can estimate the

power loss as:

LOSS

Cond

DT

SW

DR

S

PP

P

P

P

P









Thermal Regulation

As

previously

discussed,

changes

in

IC

temperature change the electrical characteristics,

especially when the temperature exceeds the

IC’s recommended operating range. Managing

the

IC’s

temperature

requires

additional

considerations to ensure that the IC runs below

the

maximum-allowable

temperature.

While

operating the IC within recommended electrical

limits is a major component to maintaining proper

thermal regulation, specific layout designs can

improve the thermal profile while limiting costs to

either efficiency or operating range.

For the MP2122, connect the ground pin on the

package to a GND plane on top of the PCB to

use this plane as a heat sink. Connect this GND

plane to GND planes beneath the IC using vias

to further improve heat dissipation. However,

given that these GND planes can introduce

unwanted EMI noise and occupy valuable PCB

space, design the size and shape of these planes

to match the thermal resistance requirement:

SA

JA

JC

   

However, connecting the GND pin to a heat sink

can not guarantee that the IC will not exceed its

recommended temperature limits; for instance, if

the ambient temperature exceeds the IC’s

temperature limits. If the ambient air temperature

approaches the IC’s temperature limit, options

such as derating the IC so it operates using less

power can help prevent thermal damage and

unwanted electrical characteristics.

PCB Layout

Proper layout of the switching power supplies is

very important, and sometimes critical for proper

function: poor layout design can result in poor

line or load regulation and stability issues.

Place the high-current paths (GND, IN and SW)

very close to the device with short, direct, and

wide traces. Place the input capacitor as close as

possible to the IN and GND pins. Place the

external feedback resistors next to the FB pin.

Keep the switching node SW short and away

from the feedback network. The circuit of below

PCB layout is shown in Figure 4.

1

8

7

6

5

OUT1

EN2

SW1

VIN

C1A

C1B

R1

R2

AGND

SW2

OUT2

EN1

R3

R4

C3

C4

C6

C5

GND

2

3

4

Figure 3: Suggested PCB Layout

Design Example

Below is a design example following the

application guidelines for the specifications:

Table 3: Design Example

VIN

5V

VOUT1

1.8V

VOUT2

1.2V

The detailed application schematic is shown in

Figure 4. The typical performance and circuit

waveforms have been shown in the Typical

Performance Characteristics section. For more

device applications, please refer to the related

Evaluation Board Datasheets.