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AM41DL3208GB30IT Arkusz danych(PDF) 3 Page - SPANSION

Numer części AM41DL3208GB30IT
Szczegółowy opis  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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Am41DL3208G
February 13, 2002
P R E L IMINARY
GENERAL DESCRIPTION
Am29DL320G Features
The Am29DL320G consists of 32 megabit, 3.0 volt-only flash
memory devices, organized as 2,097,152 words of 16 bits
each or 4,194,304 bytes of 8 bits each. Word mode data ap-
pear s on DQ 15 – DQ 0; by t e m ode da t a appear s on
DQ7–DQ0. The device is designed to be programmed
in-system with the standard 3.0 volt V
CC supply, and can
also be programmed in standard EPROM programmers.
The devices are available with access times of 70 and 85 ns.
The device is offered in a 73-ball FBGA package. Standard
control pins—chip enable (CE#f), write enable (WE#), and
output enable (OE#)—control normal read and write opera-
tions, and avoid bus contention issues.
The devices requires only a single 3.0 volt power supply
for both read and write functions. Internally generated and
regulated voltages are provided for the program and erase
operations.
Simultaneous Read/Write Operations with
Zero Latency
The Simultaneous Read/Write architecture provides simul-
taneous operation by dividing the memory space into four
banks, two 4 Mb banks with small and large sectors, and
two 12 Mb banks of large sectors. Sector addresses are
fixed, system software can be used to form user-defined
bank groups.
During an Eras e/Program operation, any of the three
non-busy banks may be read from. Note that only two banks
can operate simultaneously. The device allows a host sys-
tem to program or erase in one bank, then immediately and
simultaneously read from the other bank, with zero latency.
This releases the system from waiting for the completion of
program or erase operations.
The Am29DL320G can be organized as either a top or bot-
tom boot sector configuration.
Am41DL3208G Features
The SecSiTM (Secured Silicon) Sector is an 256 byte extra
sector capable of being permanently locked by AMD or cus-
tomers. The SecSi Indicator Bit (DQ7) is permanently set
to a 1 if the part is factory locked, and set to a 0 if cus-
tomer lockable. This way, customer lockable parts can
never be used to replace a factory locked part. Note that
some previous AMD 32 Mbit Am29DL32x devices had a
larger SecSi Sector. Factory locked parts provide several
options. The SecSi Sector may store a secure, random 16
byte ESN (Electronic Serial Number), customer code (pro-
grammed through AMD’s ExpressFlash service), or both.
DMS (Data Management Software) allows systems to eas-
ily take advantage of the advanced architecture of the
simultaneous read/write product line by allowing removal of
EEPROM devices. DMS will also allow the system software
to be simplified, as it will perform all functions necessary to
modify data in file structures, as opposed to single-byte
modifications. To write or update a particular piece of data (a
phone number or configuration data, for example), the user
only needs to state which piece of data is to be updated, and
where the updated data is located in the system. This is an
advantage compared to systems where user-written soft-
ware must keep track of the old data location, status, logical
to physical translation of the data onto the Flash memory de-
v i ce ( o r me mo r y d e v i ce s), a n d mo re . U s i n g D M S,
user-written software does not need to interface with the
Flash memory directly. Instead, the user's software ac-
ces s es t he F las h m em o ry b y c allin g one of only s ix
functions. AMD provides this software to simplify system de-
sign and software integration efforts.
The device offers complete compatibility with the JEDEC
single-power-supply Flash command set standard.
Commands are written to the command register using stan-
dard microprocessor write timings. Reading data out of the
device is similar to reading from other Flash or EPROM
devices.
The host system can detect whether a program or erase op-
eration is complete by using the device status bits: RY/BY#
pin, DQ7 (Data# Polling) and DQ6/DQ2 (toggle bits). After a
program or erase cycle has been completed, the device au-
tomatically returns to reading array data.
The sector erase architecture allows memory sectors to be
erased and reprogrammed without affecting the data con-
tents of other sectors. The device is fully erased when
shipped from the factory.
Hardware data protection measures include a low VCC de-
tector that automatically inhibits write operations during
power transitions. The hardware sector protection feature
disables both program and erase operations in any combi-
nation of the sectors of memory. This can be achieved
in-system or via programming equipment.
The device offers two power-saving features. When ad-
dresses have been stable for a specified amount of time, the
device enters the automatic sleep mode. The system can
also place the device into the standby mode. Power con-
sumption is greatly reduced in both modes.
Bank
Megabits
Sector Sizes
Bank 1
4 Mb
Eight 8 Kbyte/4 Kword,
Seven 64 Kbyte/32 Kword
Bank 2
12 Mb
Twenty-four 64 Kbyte/32 Kword
Bank 3
12 Mb
Twenty-four 64 Kbyte/32 Kword
Bank 4
4 Mb
Eight 64 Kbyte/32 Kword


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