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AD8372ACPZ-WP Arkusz danych(PDF) 7 Page - Analog Devices |
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AD8372ACPZ-WP Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 16 page Data Sheet AD8372 Rev. C | Page 7 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR DVS1 LCH1 SDI1 CLK1 CLK2 SDI2 LCH2 DVS2 NOTES 1. THE EXPOSED PAD SHOULD BE CONNECTED TO AGD1 AND AGD2. OPC1 ONC1 AGD1 SDO1 SDO2 AGD2 ONC2 OPC2 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 AD8372 TOP VIEW (Not to Scale) Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 DVS1 Digital Supply Pin for Channel 1 2 LCH1 Latch Input for Channel 1 3 SDI1 Serial Data Input for Channel 1 4 CLK1 Clock Input for Channel 1 5 CLK2 Clock Input for Channel 2 6 SDI2 Serial Data Input for Channel 2 7 LCH2 Serial Data Input for Channel 2 Latch Input for Channel 2 8 DVS2 Digital Supply Pin for Channel 2 9 DGD2 Digital Ground for Channel 2 10 INC2 Negative Input for Channel 2 11 IPC2 Positive Input for Channel 2 12 REF2 Reference Voltage for Channel 2 13 RXT2 External Bias Setting Resistor Connection for Channel 2 14 AGD2 Analog Ground for Channel 2 15 ENB2 Chip Enable Pin for Channel 2 16 AVS2 Analog Supply Pin for Channel 2 17 OPC2 Positive Output for Channel 2 18 ONC2 Negative Output for Channel 2 19 AGD2 Analog Ground for Channel 2 20 SDO2 Serial Data Output for Channel 2 21 SDO1 Serial Data Output for Channel 1 22 AGD1 Analog Ground for Channel 1 23 ONC1 Negative Output for Channel 1 24 OPC1 Positive Output for Channel 1 25 AVS1 Analog Supply Pin for Channel 1 26 ENB1 Chip Enable Pin for Channel 1 27 AGD1 Analog Ground for Channel 1 28 RXT1 External Bias Setting Resistor Connection for Channel 1 29 REF1 Reference Voltage for Channel 1 30 IPC1 Positive Input for Channel 1 31 INC1 Negative Input for Channel 1 32 DGD1 Digital Ground for Channel 1 EPAD Exposed Pad. The exposed pad should be connected to AGD1 and AGD2. |
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