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ADA4960-1ACPZ-RL Arkusz danych(PDF) 7 Page - Analog Devices

Numer części ADA4960-1ACPZ-RL
Szczegółowy opis  5 GHz, Low Distortion lADC Driver/Line Driver
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ADA4960-1ACPZ-RL Arkusz danych(HTML) 7 Page - Analog Devices

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Data Sheet
ADA4960-1
Rev. A | Page 7 of 19
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD MUST BE CONNECTED TO GND.
12
11
10
1
3
4
VCC
VOP
VON
9
VCC
VIP
IIN
2
IIP
VIN
TOP VIEW
(Not to Scale)
ADA4960-1
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VIP
Balanced Differential Input. This pin is internally biased to VCC/2.
2
IIP
Gain Setting Resistor. Connect RG between this pin and IIN.
3
IIN
Gain Setting Resistor. Connect RG between this pin and IIP.
4
VIN
Balanced Differential Input. This pin is internally biased to VCC/2.
5, 6
NC
Leave these pins unconnected.
7, 8, 9, 12
VCC
Positive 5 V Supply Pins.
10
VON
Balanced Differential Output. This pin is biased to the VOCM input voltage.
11
VOP
Balanced Differential Output. This pin is biased to the VOCM input voltage.
13
VOCM
This pin is internally biased at VCC/2. As an input, this pin sets the dc VOP and VON voltages.
14, 15
GND
Ground. Connect this pin to a low impedance ground.
16
PD
This pin grounded disables the part, and at 5 V, this pin turns the part on.
EPAD
The exposed pad must be connected to GND.


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