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ADA4940-2ACPZ-RL Arkusz danych(PDF) 8 Page - Analog Devices |
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ADA4940-2ACPZ-RL Arkusz danych(HTML) 8 Page - Analog Devices |
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8 / 30 page  ADA4940-1/ADA4940-2 Data Sheet Rev. E | Page 8 of 30 ABSOLUTE MAXIMUM RATINGS Table 9. Parameter Rating Supply Voltage 8 V VOCM ±VS Differential Input Voltage 1.2 V Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C ESD Field Induced Charged Device Model (FICDM) 1250 V Human Body Model (HBM) 2000 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for the device soldered on a circuit board in still air. Table 10. Package Type θJA Unit 8-Lead SOIC (Single)/4-Layer Board 158 °C/W 16-Lead LFCSP (Single)/4-Layer Board 91.3 °C/W 24-Lead LFCSP (Dual)/4-Layer Board 65.1 °C/W MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the ADA4940-1/ ADA4940-2 packages is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4940-1/ADA4940-2. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power dissipation is the voltage between the supply pins (±VS) times the quiescent current (IS). The load current consists of the differential and common-mode currents flowing to the load, as well as currents flowing through the external feedback networks and internal common-mode feedback loop. The internal resistor tap used in the common-mode feedback loop places a negligible differential load on the output. Consider rms voltages and currents when dealing with ac signals. Airflow reduces θJA. In addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes reduces the θJA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead SOIC (θJA = 158°C/W, single) the 16-lead LFCSP (θJA = 91.3°C/W, single) and 24-lead LFCSP (θJA = 65.1°C/W, dual) packages on a JEDEC standard 4-layer board. θJA values are approximations. 3.5 0 –40 –20 0 20 40 60 120 100 80 AMBIENT TEMPERATURE (°C) 0.5 1.0 1.5 2.0 2.5 3.0 ADA4940-2 (LFCSP) ADA4940-1 (LFCSP) ADA4940-1 (SOIC) Figure 3. Maximum Safe Power Dissipation vs. Ambient Temperature ESD CAUTION |
Podobny numer części - ADA4940-2ACPZ-RL |
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Podobny opis - ADA4940-2ACPZ-RL |
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