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NBSG16BAR2 Arkusz danych(PDF) 6 Page - ON Semiconductor |
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NBSG16BAR2 Arkusz danych(HTML) 6 Page - ON Semiconductor |
6 / 10 page NBSG16 http://onsemi.com 6 Table 7. DC CHARACTERISTICS, NECL OR RSNECL INPUT WITH NECL OUTPUT VCC = 0 V; VEE = -3.465 V to -2.375 V (Note 13) -40 °C 25 °C 85 °C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit IEE Negative Power Supply Current 17 23 29 17 23 29 17 23 29 mA VOH Output HIGH Voltage (Note 14) -1050 -970 -925 -975 -935 -900 -950 -910 -875 mV VOUTPP Output Voltage Amplitude 350 410 525 350 410 525 350 410 525 mV VIH Input HIGH Voltage (Single-Ended) (Note 15) VTHR + 75 mV VCC - 1.0* VCC VTHR + 75 mV VCC - 1.0* VCC VTHR + 75 mV VCC - 1.0* VCC V VIL Input LOW Voltage (Single-Ended) (Note 15) VEE VCC - 1.4* VTHR - 75 mV VEE VCC - 1.4* VTHR - 75 mV VEE VCC - 1.4* VTHR - 75 mV V VBB NECL Output Voltage Reference -1420 -1360 -1300 -1420 -1360 -1300 -1420 -1360 -1300 mV VIHCMR Input HIGH Voltage Common Mode Range (Note 16) (Differential Configuration) VEE+1.2 0.0 VEE+1.2 0.0 VEE+1.2 0.0 V VMM CMOS Output Voltage Reference (Note 17) VMMT -150 VMMT VMMT + 150 VMMT -150 VMMT VMMT + 150 VMMT -150 VMMT VMMT + 150 mV RTIN Internal Input Termination Resis- tor 45 50 55 45 50 55 45 50 55 W IIH Input HIGH Current (@ VIH) 30 100 30 100 30 100 mA IIL Input LOW Current (@ VIL) 25 50 25 50 25 50 mA NOTE: SiGe circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 13. Input and output parameters vary 1:1 with VCC. 14. All loading with 50 W to VCC -2.0 volts. 15. VTHR is the voltage applied to the complementary input, typically VBB or VMM. 16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. 17. VMM typical = |VCC - VEE|/2 + VEE = VMMT *Typicals used for testing purposes. Table 8. AC CHARACTERISTICS for FCBGA-16 VCC = 0 V; VEE = -3.465 V to -2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V -40 °C 25 °C 85 °C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit fmax Maximum Frequency (See Figure 4. Fmax/JITTER) (Note 18) 10.7 12 10.7 12 10.7 12 GHz tPLH, tPHL Propagation Delay to Output Differential 90 110 130 100 120 140 105 125 145 ps tSKEW Duty Cycle Skew (Note 19) 3 15 3 15 3 15 ps tJITTER RMS Random Clock Jitter fin < 10 GHz Peak-to-Peak Data Dependent Jitter fin < 10 Gb/s 0.2 TBD 1 0.2 TBD 1 0.2 TBD 1 ps VINPP Input Voltage Swing/Sensitivity (Differential Configuration) (Note 20) 75 2600 75 2600 75 2600 mV tr tf Output Rise/Fall Times @ 1 GHz Q, Q (20% - 80%) 30 45 75 20 40 65 20 40 65 ps 18. Measured using a 400 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. Input edge rates 40 ps (20% - 80%). 19. See Figure 6. tskew = |tPLH - tPHL| for a nominal 50% differential clock input waveform. 20. VINPP(max) cannot exceed VCC - VEE |
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