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ADM6918 Arkusz danych(PDF) 7 Page - Infineon Technologies AG |
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ADM6918 Arkusz danych(HTML) 7 Page - Infineon Technologies AG |
7 / 124 page Data Sheet 7 Rev 1.01, 2005-11-08 ADM6918/X List of Tables Table 1 Abbreviations for Pin Type 12 Table 2 Abbreviations for Buffer Type 12 Table 3 I/O Signals 13 Table 4 Address Recognition and Packet Forwarding 19 Table 5 Packets Received are Untagged 21 Table 6 Packets Received are Tagged 21 Table 7 Port Rising Threshold 22 Table 8 Port Falling Threshold 23 Table 9 Discard Ratio 23 Table 10 Special TAG Fields 25 Table 11 SS-SMII and RMII Pins 27 Table 12 Port 24 Duplex Configuration 28 Table 13 Port 25 Duplex Configuration 28 Table 14 Pin Type of EECS, EESK, EDI and EDO during Operation 30 Table 15 EEPROM Format 31 Table 16 Registers Address Space 36 Table 17 Registers Overview 36 Table 18 Register Access Types 40 Table 19 Registers Clock DomainsRegisters Clock Domains 41 Table 20 PCR_x Registers 46 Table 21 Resx Registers 47 Table 22 FGOPML_x Registers 51 Table 23 FGOPMH_x Registers 53 Table 24 Px_VID Registers 56 Table 25 Switch Register Map 85 Table 26 Registers Address SpaceRegisters Address Space 86 Table 27 Registers Overview 86 Table 28 Register Access Types 86 Table 29 Registers Clock DomainsRegisters Clock Domains 87 Table 30 Control Register Description 91 Table 31 Field Description in the Control Register 91 Table 32 Status Register Description 92 Table 33 Field Description in the Status Register 93 Table 34 Example 94 Table 35 Control Register Description 95 Table 36 Field Description in the Control Register 95 Table 37 Status Register Description 96 Table 38 Field Description in the Status Register 96 Table 39 Example 97 Table 40 Counter Register: Offset 0100H ~ 0167H 109 Table 41 Electrical Absolute Maximum Ratings 113 Table 42 Recommended Operating Conditions 113 Table 43 DC Electrical Characteristics for 3.3 V Operation 113 Table 44 Crystal/Oscillator Timing 114 Table 45 Power on Reset Timing 115 Table 46 EEPROM Interface Timing 115 Table 47 10Base-TX MII Output Timing 116 Table 48 10Base-TX MII Input Timing 117 Table 49 100Base-TX MII Output Timing 118 List of Tables |
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