ADL5521

Data Sheet

Rev. C | Page 6 of 24

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VBIAS

RFIN

NIC

NIC

RFOUT

VPOS

NIC

NIC

NOTES

1. NIC = NO INTERNAL CONNECTION. DO

NOT CONNECT TO THIS PIN.

2. CONNECT THE EXPOSED PAD TO A LOW

IMPEDANCE GROUND PLANE.

3

4

1

2

6

5

8

7

ADL5521

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VBIAS

Internal DC Bias. This pin should be connected to VPOS through the R1 resistor.

2

RFIN

RF Input. This is the input to the LNA.

3, 4, 5, 6

NC

No Connection. No internal connection.

7

RFOUT

RF Output.

8

VPOS

Supply Voltage. DC bias needs to be bypassed to ground using a low inductance capacitor. This pin is

also used for output matching. See the Basic Connections section.

9 (EPAD)

Exposed Pad (EPAD)

GND. Connect the exposed pad to a low impedance ground plane.