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ADSP-21161NKCA-100 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części ADSP-21161NKCA-100
Szczegółowy opis  DSP Microcomputer
Download  60 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADSP-21161NKCA-100 Arkusz danych(HTML) 4 Page - Analog Devices

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ADSP-21161N
–4–
REV. A
The ADSP-21161N continues SHARC’s industry-leading
standards of integration for DSPs, combining a high performance
32-bit DSP core with integrated, on-chip system features. These
features include a 1 M bit dual ported SRAM memory, host
processor interface, I/O processor that supports 14 DMA
channels, four serial ports, two link ports, SDRAM controller,
SPI interface, external parallel bus, and glueless multiprocessing.
The block diagram of the ADSP-21161N on Page 1 illustrates
the following architectural features:
• Two processing elements, each made up of an ALU, Mul-
tiplier, Shifter, and Data Register File
• Data Address Generators (DAG1, DAG2)
• Program sequencer with instruction cache
• PM and DM buses capable of supporting four 32-bit data
transfers between memory and the core every core
processor cycle
• Interval timer
• On-Chip SRAM (1 M bit)
• SDRAM Controller for glueless interface to SDRAMs
• External port that supports:
• Interfacing to off-chip memory peripherals
• Glueless multiprocessing support for six ADSP-
21161N SHARCs
• Host port read/write of IOP registers
• DMA controller
• Four serial ports
• Two link ports
• SPI compatible interface
• JTAG test access port
• 12 General-Purpose I/O Pins
Figure 1 shows a typical single-processor system. A multiprocess-
ing system appears in Figure 4 on Page 8.
Figure 1. System Diagram
DMA DEVICE
(OPTIONAL)
DATA
CLKOUT
DMAR2-1
DMAG2-1
ADDR
DATA
HOST
PROCESSOR
INTERFACE
(OPTIONAL)
3
12
CLOCK
CLKIN
XTAL
IRQ2-0
2
CLK_CFG1-0
EBOOT
LBOOT
FLAG11-0
TIMEXP
CLKDBL
RESET
JTAG
7
SBTS
ADSP-21161N
BMS
LINK
DEVICES
(2 MAX)
(OPTIONAL)
LXCLK
LXACK
LXDAT7-0
SCLK0
D0B
D0A
FS0
SERIAL
DEVICE
(OPTIONAL)
CS
BOOT
EPROM
(OPTIONAL)
ADDR
MEMORY
AND
PERIPHERALS
(OPTIONAL)
OE
DATA
CS
RD
RAS
ACK
BR6-1
RPBA
ID2-0
PA
HBG
HBR
SDWE
MS3-0
WR
DATA47-16
DATA
ADDR
CS
ACK
WE
ADDR23-0
BRST
SDRAM
(OPTIONAL)
SCLK1
D1B
D1A
FS1
SERIAL
DEVICE
(OPTIONAL)
SCLK2
D2B
D2A
FS2
SERIAL
DEVICE
(OPTIONAL)
SCLK3
D3B
D3A
FS3
SERIAL
DEVICE
(OPTIONAL)
SPICLK
MISO
MOSI
SPIDS
SPI
COMPATIBLE
DEVICE
(HOST OR SLAVE)
(OPTIONAL)
DATA
CAS
RAS
DQM
WE
ADDR
CS
A10
CKE
CLK
DQM
CAS
REDY
SDCKE
SDA10
SDCLK1-0
RSTOUT


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