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ADS1278-SP Arkusz danych(PDF) 46 Page - Texas Instruments |
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ADS1278-SP Arkusz danych(HTML) 46 Page - Texas Instruments |
46 / 57 page IN1(+) AINP1 AINN1 IN4/8(+) +3.3 V +1.8 V (6) AINP4/8 AINN4/8 AVDD DVDD VREFP VREFN VCOM TEST0 TEST1 DIN AGND DGND IOVDD CLK DRDY/FSYNC DVDD (I/O) DR FSR DOUT1 SCLK CVDD (CORE) DOUT2 DOUT3 DOUT4 SYNC PWDN1 I/O PWDN2 PWDN3 PWDN4 CLKDIV FORMAT2 MODE1 FORMAT1 FORMAT0 10 µF (2) + 10 µF (2) 10 µF + 0.1 µF (2) 0.1 µF (2) LM4050QML-SP +5 V 10 µF (2) 50 Ω +3.3 V (High-Speed, Frame-Sync, TDM, and Fixed-Position data selected.) ADS1278-SP Microcontroller / DSP 200 MHz +1.6 V THS4521 (1) 2.2 nF (3) 2.2 nF (3) (4) Buffered VCOM Output 100 Ω See Note (5) 50 Ω U1 U2 CLKR Q Q 0 > +3.3 V MODE0 IN1(-) IN4/8(-) 1 µF +5 V See Note (6) LM124AQML-SP 46 ADS1278-SP SBAS937 – SEPTEMBER 2018 www.ti.com Product Folder Links: ADS1278-SP Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The ADS1278-SP is a radiation-hardened high resolution delta-sigma ADC that is ideal for precision sensing and high accuracy instrumentation applications. With eight simultaneous sampling 24-bit ADCs integrated, the device reduces the board area needed to digitize eight analog signals. 9.2 Typical Application Figure 83. Typical Application Schematic 9.2.1 Design Requirements Depending on the accuracy and speed requirements of the sensing application to be digitized by the ADC1278- SP, users must first determine the optimal device configuration. Table 16 shows the possible configurations for device for the maximum fCLKIN for each configuration. The yellow highlighted columns indicate user defined inputs (through I/O pins) to the device, while the italic row indicates the default configuration of the ADS1278EVM-CVAL EVM that is available as a reference design. As shown, a maximum data rate of 52734 SPS is possible while using the High Resolution mode, which yields a typical SNR of 111 dB or an ENOB of 18 bits. |
Podobny numer części - ADS1278-SP |
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Podobny opis - ADS1278-SP |
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