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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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FAN1851AN Arkusz danych(PDF) 6 Page - Fairchild Semiconductor |
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FAN1851AN Arkusz danych(HTML) 6 Page - Fairchild Semiconductor |
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6 / 11 page  FAN1851A PRODUCT SPECIFICATION 6 REV. 2.0.1 6/17/05 Application Information A typical ground fault interrupter circuit is shown in Figure 10. It is designed to operate on 120 VAC line voltage with 5mA normal fault sensitivity. A full-wave rectifier bridge and a 15k Ω/2W resistor are used to supply the DC power required by the IC. A 1 µF capacitor at the "+VS" pin is used to filter the ripple of the supply volt- age and is also connected across the SCR to allow firing of the SCR on either half-cycle. When a fault causes the SCR to trigger, the circuit breaker is energized and line voltage is removed from the load. At this time no fault current flows and the CT discharge cur- rent increases from ITH to 3ITH (see Block Diagram). This quickly resets both the timing capacitor and the output latch. The circuit breaker can be reset and the line voltage again supplied to the load, assuming the fault has been removed. A 1000:1 sense transformer is used to detect the normal fault. The fault current, which is basically the difference in current between the hot and neutral lines, is stepped down by 1000 and fed into the input pin of the operational amplifier through a 10µF capacitor. The 0.0033µF capacitor between the "- Input" pin and the "+ Input" pin and the 200pF capaci- tor between "+ Input" and "Ground" pins are added to obtain better noise immunity. The normal fault sensitivity is deter- mined by the timing capacitor discharging current, ITH. ITH can be calculated by: (1) At the decision point, the average fault current just equals the threshold current, ITH. (2) Where IF(rms) is the rms input fault current to the opera- tional amplifier and the factor of 2 is due to the fact that IF charges the timing capacitor only during one half-cycle, while ITH discharges the capacitor continuously. The factor 0.91 converts the rms value to an average value. Combining equations (1) and (2) we have: (3) For example, to obtain 5mA(rms) sensitivity for the circuit in Figure 7 we have: (4) I TH 7V R SET ------------- 2 ÷ = I TH I F rms () 2 ------------------- 0.91 × = R SET 7V I F rms () 0.91 × ------------------------------------ = R SET 7V 5 mA 0.91 × 1000 ------------------------------ ------------------------------ 1.5M Ω = = The correct value for RSET can also be determined from the characteristic curve that plots equation (3). Note that this is an approximate calculation; the exact value of RSET depends on the specific sense transformer used and FAN1851A toler- ances. Inasmuch as UL943 specifies a sensitivity “window” of 4mA to 6mA, a provision should be made to adjust RSET with a potentiometer. Independent of setting sensitivity, the desired integration time can be obtained through proper selection of the timing capacitor, CT. Due to the large number of variables involved, proper selection of CT is best done empirically. The follow- ing design example should only be used as a guideline. Assume the goal is to meet UL943 timing requirements. Also assume that worst case timing occurs during GFI start-up (S1 closure) with both a heavy normal fault and a 2 Ω grounded neutral fault present. This situation is shown in Figure 8. Figure 8. Example UL943 specifies ≤ 25ms average trip time under these condi- tions. Calculation of CT based upon charging currents due to normal fault only is as follows: 1. Start with a ≤ 25ms specification. Subtract 3ms GFI turn-on time (15k Ω and 1µF). Subtract 8ms potential loss of one half-cycle due to fault current sense of half-cycles only. 2. Subtract 4ms time required to open a sluggish circuit breaker. 3. This gives a total ≤ 10ms maximum integration time that could be allowed. 4. To generate 8ms value of integration time that accom- modates component tolerances and other variables: (5) Line Neutral Hot S1 GFI Hot Neutral RB 500 I RB 500 (0.2)I (0.8)I RN 0.4 C T IT × V ----------- = |
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