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MAX8725ETI Arkusz danych(PDF) 25 Page - Maxim Integrated Products

Numer części MAX8725ETI
Szczegółowy opis  Multichemistry Battery Charger with Automatic System Power Selector
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Producent  MAXIM [Maxim Integrated Products]
Strona internetowa  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX8725ETI Arkusz danych(HTML) 25 Page - Maxim Integrated Products

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Multichemistry Battery Chargers with Automatic
System Power Selector
______________________________________________________________________________________
25
The loop transfer function is given by:
Since:
the loop transfer function simplifies to:
The crossover frequency is given by:
For stability, choose a crossover frequency lower than
1/10th the switching frequency:
CCS = GMS / (2π fCO_CS)
Choosing a crossover frequency of 30kHz and using
the component values listed in Figure 1 yields CCS >
5.4nF. Values for CCI greater than 10 times the mini-
mum value may slow down the current-loop response
excessively. Figure 10 shows the Bode plot of the input
current-limit loop frequency response using the values
calculated above.
MOSFET Drivers
The DHI and DLO outputs are optimized for driving
moderately-sized power MOSFETs. The MOSFET drive
capability is the same for both the low-side and high-
side switches. This is consistent with the variable duty
factor that occurs in the notebook computer environ-
ment where the battery voltage changes over a wide
range. An adaptive dead-time circuit monitors the DLO
output and prevents the high-side FET from turning on
until DLO is fully off. There must be a low-resistance,
low-inductance path from the DLO driver to the
MOSFET gate for the adaptive dead-time circuit to work
properly. Otherwise, the sense circuitry in the
MAX1909/MAX8725 interpret the MOSFET gate as “off”
while there is still charge left on the gate. Use very
short, wide traces measuring 10 squares to 20 squares
or less (1.25mm to 2.5mm wide if the MOSFET is 25mm
from the device). Unlike the DLO output, the DHI output
uses a fixed-delay 50ns time to prevent the low-side
FET from turning on until DHI is fully off. The same lay-
out considerations should be used for routing the DHI
signal to the high-side FET.
Since the transition time for a p-channel switch can be
much longer than an n-channel switch, the dead time
prior to the high-side PMOS turning on is more pro-
nounced than in other synchronous step-down regula-
tors, which use high-side n-channel switches. On the
high-to-low transition, the voltage on the inductor’s
“switched” terminal flies below ground until the low-side
switch turns on. A similar dead-time spike occurs on
the opposite low-to-high transition. Depending upon the
magnitude of the load current, these spikes usually
have a minor impact on efficiency.
The high-side driver (DHI) swings from SRC to 5V
below SRC and typically sources 0.9A and sinks 0.5A
from the gate of the p-channel FET. The internal pull-
down transistors that drive DHI high are robust, with a
2.0Ω (typ) on-resistance.
The low-side driver (DLO) swings from DLOV to ground
and typically sources 0.5A and sinks 0.9A from the gate
of the n-channel FET. The internal pulldown transistors
that drive DLO low are robust, with a 1.0Ω (typ) on-
resistance. This helps prevent DLO from being pulled
up when the high-side switch turns on, due to capaci-
tive coupling from the drain to the gate of the low-side
MOSFET. This places some restrictions on the FETs
that can be used. Using a low-side FET with smaller
gate-to-drain capacitance can prevent these problems.
f
GMS
C
CO CS
CS
_
=
LTF
GMS
R
sR
C
OGMS
OGMS
CS
=
1
GM
ARS
IN
CSS
=
×
1
1
LTF
GM
A
RS
GMS
R
sR
C
IN
CSS
OGMS
OGMS
CS
×
×
1
1
FREQUENCY (Hz)
100k
10M
1k
10
-20
0
20
40
60
100
80
-40
-45
0
-90
0.1
MAG
PHASE
Figure 10. CCS Loop Response


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