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AD7683BRM Arkusz danych(PDF) 7 Page - Analog Devices |
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AD7683BRM Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 16 page AD7683 Rev. 0 | Page 7 of 16 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS REF 1 +IN 2 –IN 3 GND 4 VDD 8 DCLOCK 7 DOUT 6 CS 5 AD7683 TOP VIEW (Not to Scale) Figure 6. 8-Lead MSOP and QFN1 (LFCSP) Pin Configuration Table 7. Pin Function Descriptions Pin No. Mnemonic Type2 Function 1 REF AI Reference Input Voltage. The REF range is from 0.5 V to VDD. It is referred to the GND pin. This pin should be decoupled closely to the pin with a ceramic capacitor of a few µF. 2 +IN AI Analog Input. It is referred to in –IN. The voltage range, i.e., the difference between +IN and –IN, is 0 V to VREF. 3 –IN AI Analog Input Ground Sense. To be connected to the analog ground plane or to a remote sense ground. 4 GND P Power Supply Ground. 5 CS DI Chip Select Input. On its falling edge, it initiates the conversions. The part returns in shutdown mode as soon as the conversion is done. It also enables DOUT. When high, DOUT is high impedance. 6 DOUT DO Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK. 7 DCLOCK DI Serial Data Clock Input. 8 VDD P Power Supply. 1 QFN package in development. Contact factory for samples and availability. 2 AI = Analog Input; DI = Digital Input; DO = Digital Output; and P = Power |
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