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TSC83251G2D-24IA Arkusz danych(PDF) 9 Page - ATMEL Corporation |
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TSC83251G2D-24IA Arkusz danych(HTML) 9 Page - ATMEL Corporation |
9 / 76 page 9 AT/TSC8x251G2D 4135D–8051–08/05 T1:0 I/O Timer 1:0 External Clock Inputs When timer 1:0 operates as a counter, a falling edge on the T1:0 pin increments the count. – T2 I/O Timer 2 Clock Input/Output For the timer 2 capture mode, T2 is the external clock input. For the Timer 2 clock-out mode, T2 is the clock output. P1.0 T2EX I Timer 2 External Input In timer 2 capture mode, a falling edge initiates a capture of the timer 2 registers. In auto-reload mode, a falling edge causes the timer 2 register to be reloaded. In the up-down counter mode, this signal determines the count direction: 1 = up, 0 = down. P1.1 TXD O Transmit Serial Data TXD outputs the shift clock in serial I/O mode 0 and transmits data in serial I/O modes 1, 2 and 3. P3.1 VDD PWR Digital Supply Voltage Connect this pin to +5V or +3V supply voltage. – VPP I Programming Supply Voltage The programming supply voltage is applied to this input for programming the on-chip EPROM/OTPROM. – VSS GND Circuit Ground Connect this pin to ground. – VSS1 GND Secondary Ground 1 This ground is provided to reduce ground bounce and improve power supply bypassing. Connection of this pin to ground is recommended. However, when using the TSC80251G2D as a pin-for-pin replacement for a 8xC51 product, VSS1 can be unconnected without loss of compatibility. Not available on DIP package. – VSS2 GND Secondary Ground 2 This ground is provided to reduce ground bounce and improve power supply bypassing. Connection of this pin to ground is recommended. However, when using the TSC80251G2D as a pin-for-pin replacement for a 8xC51 product, VSS2 can be unconnected without loss of compatibility. Not available on DIP package. – WAIT# I Real-time Synchronous Wait States Input The real-time WAIT# input is enabled by setting RTWE bit in WCON (S:A7h). During bus cycles, the external memory system can signal ‘system ready’ to the microcontroller in real time by controlling the WAIT# input signal. P1.6 WCLK O Wait Clock Output The real-time WCLK output is enabled by setting RTWCE bit in WCON (S:A7h). When enabled, the WCLK output produces a square wave signal with a period of one half the oscillator frequency. P1.7 WR# O Write Write signal output to external memory. P3.6 XTAL1 I Input to the on-chip inverting oscillator amplifier To use the internal oscillator, a crystal/resonator circuit is connected to this pin. If an external oscillator is used, its output is connected to this pin. XTAL1 is the clock source for internal timing. – Table 2. Product Name Signal Description (Continued) Signal Name Type Description Alternate Function |
Podobny numer części - TSC83251G2D-24IA |
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Podobny opis - TSC83251G2D-24IA |
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